Merge branch 'x86-amd-nb-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

Pull x86 AMD northbridge updates from Ingo Molnar:
 "Update DF/SMN access and k10temp for AMD F17h M30h, by Brian Woods:

   'Updates the data fabric/system management network code needed to get
    k10temp working for M30h. Since there are now processors which have
    multiple roots per DF/SMN interface, there needs to some logic which
    skips N-1 root complexes per DF/SMN interface. This is because the
    root complexes per interface are redundant (as far as DF/SMN goes).
    These changes shouldn't effect past processors and, for F17h M0Xh,
    the mappings stay the same.'

  The hwmon changes were seen and acked by hwmon maintainer Guenter Roeck"

* 'x86-amd-nb-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  hwmon/k10temp: Add support for AMD family 17h, model 30h CPUs
  x86/amd_nb: Add PCI device IDs for family 17h, model 30h
  x86/amd_nb: Add support for newer PCI topologies
  hwmon/k10temp, x86/amd_nb: Consolidate shared device IDs

diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index a6eca647bc76e33c8d9bc730ada8cb9d384dba97..cc51275c875929ac97ec66f91f35f64d133205f0 100644 (file)
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -11,14 +11,15 @@
 #include <linux/errno.h>
 #include <linux/export.h>
 #include <linux/spinlock.h>
+#include <linux/pci_ids.h>
 #include <asm/amd_nb.h>
 
 #define PCI_DEVICE_ID_AMD_17H_ROOT     0x1450
 #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT        0x15d0
-#define PCI_DEVICE_ID_AMD_17H_DF_F3    0x1463
+#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT        0x1480
 #define PCI_DEVICE_ID_AMD_17H_DF_F4    0x1464
-#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
 #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
+#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
 
 /* Protect the PCI config register pairs used for SMN and DF indirect access. */
 static DEFINE_MUTEX(smn_mutex);
@@ -28,9 +29,11 @@ static u32 *flush_words;
 static const struct pci_device_id amd_root_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
+       { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) },
        {}
 };
 
+
 #define PCI_DEVICE_ID_AMD_CNB17H_F4     0x1704
 
 const struct pci_device_id amd_nb_misc_ids[] = {
@@ -44,6 +47,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
+       { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
        {}
 };
@@ -57,6 +61,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) },
+       { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
        {}
 };
@@ -214,7 +219,10 @@ int amd_cache_northbridges(void)
        const struct pci_device_id *root_ids = amd_root_ids;
        struct pci_dev *root, *misc, *link;
        struct amd_northbridge *nb;
-       u16 i = 0;
+       u16 roots_per_misc = 0;
+       u16 misc_count = 0;
+       u16 root_count = 0;
+       u16 i, j;
 
        if (amd_northbridges.num)
                return 0;
@@ -227,26 +235,55 @@ int amd_cache_northbridges(void)
 
        misc = NULL;
        while ((misc = next_northbridge(misc, misc_ids)) != NULL)
-               i++;
+               misc_count++;
 
-       if (!i)
+       if (!misc_count)
                return -ENODEV;
 
-       nb = kcalloc(i, sizeof(struct amd_northbridge), GFP_KERNEL);
+       root = NULL;
+       while ((root = next_northbridge(root, root_ids)) != NULL)
+               root_count++;
+
+       if (root_count) {
+               roots_per_misc = root_count / misc_count;
+
+               /*
+                * There should be _exactly_ N roots for each DF/SMN
+                * interface.
+                */
+               if (!roots_per_misc || (root_count % roots_per_misc)) {
+                       pr_info("Unsupported AMD DF/PCI configuration found\n");
+                       return -ENODEV;
+               }
+       }
+
+       nb = kcalloc(misc_count, sizeof(struct amd_northbridge), GFP_KERNEL);
        if (!nb)
                return -ENOMEM;
 
        amd_northbridges.nb = nb;
-       amd_northbridges.num = i;
+       amd_northbridges.num = misc_count;
 
        link = misc = root = NULL;
-       for (i = 0; i != amd_northbridges.num; i++) {
+       for (i = 0; i < amd_northbridges.num; i++) {
                node_to_amd_nb(i)->root = root =
                        next_northbridge(root, root_ids);
                node_to_amd_nb(i)->misc = misc =
                        next_northbridge(misc, misc_ids);
                node_to_amd_nb(i)->link = link =
                        next_northbridge(link, link_ids);
+
+               /*
+                * If there are more PCI root devices than data fabric/
+                * system management network interfaces, then the (N)
+                * PCI roots per DF/SMN interface are functionally the
+                * same (for DF/SMN access) and N-1 are redundant.  N-1
+                * PCI roots should be skipped per DF/SMN interface so
+                * the following DF/SMN interfaces get mapped to
+                * correct PCI roots.
+                */
+               for (j = 1; j < roots_per_misc; j++)
+                       root = next_northbridge(root, root_ids);
        }
 
        if (amd_gart_present())

diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index 2cef0c37ff6fe0b6c9eb9147316252d79f416b83..9790f1f5eb98dc9a5952f63ba2bfae354dddfff0 100644 (file)
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -23,6 +23,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/pci.h>
+#include <linux/pci_ids.h>
 #include <asm/amd_nb.h>
 #include <asm/processor.h>
 
@@ -41,14 +42,6 @@ static DEFINE_MUTEX(nb_smu_ind_mutex);
 #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F3       0x15b3
 #endif
 
-#ifndef PCI_DEVICE_ID_AMD_17H_DF_F3
-#define PCI_DEVICE_ID_AMD_17H_DF_F3    0x1463
-#endif
-
-#ifndef PCI_DEVICE_ID_AMD_17H_M10H_DF_F3
-#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3       0x15eb
-#endif
-
 /* CPUID function 0x80000001, ebx */
 #define CPUID_PKGTYPE_MASK     0xf0000000
 #define CPUID_PKGTYPE_F                0x00000000
@@ -367,6 +360,7 @@ static const struct pci_device_id k10temp_id_table[] = {
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
+       { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
        {}
 };
 MODULE_DEVICE_TABLE(pci, k10temp_id_table);

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 69f0abe1ba1a00d9c65990d7612412c3509b301c..349276fbd26973ead21e9006204b08f36ffe1e6e 100644 (file)
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -545,6 +545,9 @@
 #define PCI_DEVICE_ID_AMD_16H_NB_F4    0x1534
 #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F3 0x1583
 #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F4 0x1584
+#define PCI_DEVICE_ID_AMD_17H_DF_F3    0x1463
+#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
+#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493
 #define PCI_DEVICE_ID_AMD_CNB17H_F3    0x1703
 #define PCI_DEVICE_ID_AMD_LANCE                0x2000
 #define PCI_DEVICE_ID_AMD_LANCE_HOME   0x2001