}
}
-static void inline gen_io_start(void)
+static inline void gen_io_start(void)
{
TCGv_i32 tmp = tcg_const_i32(1);
tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
qemu_irq_raise(s->irq);
}
-static void inline g364fb_invalidate_display(void *opaque)
+static inline void g364fb_invalidate_display(void *opaque)
{
G364State *s = opaque;
int i;
}
}
-static void inline pflash_data_write(pflash_t *pfl, target_phys_addr_t offset,
+static inline void pflash_data_write(pflash_t *pfl, target_phys_addr_t offset,
uint32_t value, int width)
{
uint8_t *p = pfl->storage;
struct intc_desc intc;
} SH7750State;
-static int inline has_bcr3_and_bcr4(SH7750State * s)
+static inline int has_bcr3_and_bcr4(SH7750State * s)
{
return (s->cpu->features & SH_FEATURE_BCR3_AND_BCR4);
}
return len;
}
-static void inline usb_bt_fifo_out_enqueue(struct USBBtState *s,
+static inline void usb_bt_fifo_out_enqueue(struct USBBtState *s,
struct usb_hci_out_fifo_s *fifo,
void (*send)(struct HCIInfo *, const uint8_t *, int),
int (*complete)(const uint8_t *, int),
BLKIF_PROTOCOL_X86_64 = 3,
};
-static void inline blkif_get_x86_32_req(blkif_request_t *dst, blkif_x86_32_request_t *src)
+static inline void blkif_get_x86_32_req(blkif_request_t *dst, blkif_x86_32_request_t *src)
{
int i, n = BLKIF_MAX_SEGMENTS_PER_REQUEST;
dst->seg[i] = src->seg[i];
}
-static void inline blkif_get_x86_64_req(blkif_request_t *dst, blkif_x86_64_request_t *src)
+static inline void blkif_get_x86_64_req(blkif_request_t *dst, blkif_x86_64_request_t *src)
{
int i, n = BLKIF_MAX_SEGMENTS_PER_REQUEST;
}
-static unsigned int __inline__
+static __inline unsigned int
PerformComparisonOperation(floatx80 Fn, floatx80 Fm)
{
FPA11 *fpa11 = GET_FPA11();
#endif
/*** Integer load and store with byte reverse ***/
/* lhbrx */
-static void inline gen_qemu_ld16ur(DisasContext *ctx, TCGv arg1, TCGv arg2)
+static inline void gen_qemu_ld16ur(DisasContext *ctx, TCGv arg1, TCGv arg2)
{
tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx);
if (likely(!ctx->le_mode)) {
GEN_LDX(lhbr, ld16ur, 0x16, 0x18, PPC_INTEGER);
/* lwbrx */
-static void inline gen_qemu_ld32ur(DisasContext *ctx, TCGv arg1, TCGv arg2)
+static inline void gen_qemu_ld32ur(DisasContext *ctx, TCGv arg1, TCGv arg2)
{
tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx);
if (likely(!ctx->le_mode)) {
GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
/* sthbrx */
-static void inline gen_qemu_st16r(DisasContext *ctx, TCGv arg1, TCGv arg2)
+static inline void gen_qemu_st16r(DisasContext *ctx, TCGv arg1, TCGv arg2)
{
if (likely(!ctx->le_mode)) {
TCGv t0 = tcg_temp_new();
GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER);
/* stwbrx */
-static void inline gen_qemu_st32r(DisasContext *ctx, TCGv arg1, TCGv arg2)
+static inline void gen_qemu_st32r(DisasContext *ctx, TCGv arg1, TCGv arg2)
{
if (likely(!ctx->le_mode)) {
TCGv t0 = tcg_temp_new();