ASoC: cs42l42: Only start PLL if it is needed

The PLL is only needed for sclk < 11289600 Hz and cs42l42_pll_config()
will not configure it for higher rates. So it must only be enabled
when it is needed.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210306185553.62053-15-tanureal@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index 08718fd10fb9b02c58adea64d3018c1c111f7964..d7a314aa59b73c68b40d0a367bf85c81a324e57b 100644 (file)
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -887,8 +887,9 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
        } else {
                if (!cs42l42->stream_use) {
                        /* SCLK must be running before codec unmute */
-                       snd_soc_component_update_bits(component, CS42L42_PLL_CTL1,
-                                                     CS42L42_PLL_START_MASK, 1);
+                       if ((cs42l42->bclk < 11289600) && (cs42l42->sclk < 11289600))
+                               snd_soc_component_update_bits(component, CS42L42_PLL_CTL1,
+                                                             CS42L42_PLL_START_MASK, 1);
 
                        /* Mark SCLK as present, turn off internal oscillator */
                        regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_sclk_seq,