* @dev: Pointer to device structure
* @phy_node: Pointer to device node structure
* @mii_bus: Pointer to MII bus structure
+ * @regs_start: Resource start for axienet device addresses
* @regs: Base address for the axienet_local device address space
* @dma_regs: Base address for the axidma device address space
* @dma_err_tasklet: Tasklet structure to process Axi DMA errors
struct mii_bus *mii_bus; /* MII bus reference */
/* IO registers, dma functions and IRQs */
+ resource_size_t regs_start;
void __iomem *regs;
void __iomem *dma_regs;
lp->options = XAE_OPTION_DEFAULTS;
/* Map device registers */
ethres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ lp->regs_start = ethres->start;
lp->regs = devm_ioremap_resource(&pdev->dev, ethres);
if (IS_ERR(lp->regs)) {
dev_err(&pdev->dev, "could not map Axi Ethernet regs.\n");
int ret;
u32 clk_div, host_clock;
struct mii_bus *bus;
- struct resource res;
+ struct device_node *mdio_node;
struct device_node *np1;
/* clk_div can be calculated by deriving it from the equation:
if (!bus)
return -ENOMEM;
- np1 = of_get_parent(lp->phy_node);
- of_address_to_resource(np1, 0, &res);
- snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
- (unsigned long long) res.start);
+ mdio_node = of_get_parent(lp->phy_node);
+ snprintf(bus->id, MII_BUS_ID_SIZE, "axienet-%.8llx",
+ (unsigned long long)lp->regs_start);
bus->priv = lp;
bus->name = "Xilinx Axi Ethernet MDIO";
bus->parent = lp->dev;
lp->mii_bus = bus;
- ret = of_mdiobus_register(bus, np1);
+ ret = of_mdiobus_register(bus, mdio_node);
if (ret) {
mdiobus_free(bus);
lp->mii_bus = NULL;