/*
* on-motherboard FPGA PIC operations
*/
-static void frv_fpga_enable(unsigned int irq)
+static void frv_fpga_mask(unsigned int irq)
{
uint16_t imr = __get_IMR();
- imr &= ~(1 << (irq - IRQ_BASE_FPGA));
+ imr |= 1 << (irq - IRQ_BASE_FPGA);
__set_IMR(imr);
}
-static void frv_fpga_disable(unsigned int irq)
+static void frv_fpga_ack(unsigned int irq)
+{
+ __clr_IFR(1 << (irq - IRQ_BASE_FPGA));
+}
+
+static void frv_fpga_mask_ack(unsigned int irq)
{
uint16_t imr = __get_IMR();
imr |= 1 << (irq - IRQ_BASE_FPGA);
-
__set_IMR(imr);
-}
-static void frv_fpga_ack(unsigned int irq)
-{
__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
}
-static void frv_fpga_end(unsigned int irq)
+static void frv_fpga_unmask(unsigned int irq)
{
+ uint16_t imr = __get_IMR();
+
+ imr &= ~(1 << (irq - IRQ_BASE_FPGA));
+
+ __set_IMR(imr);
}
static struct irq_chip frv_fpga_pic = {
.name = "mb93091",
- .enable = frv_fpga_enable,
- .disable = frv_fpga_disable,
.ack = frv_fpga_ack,
- .mask = frv_fpga_disable,
- .unmask = frv_fpga_enable,
- .end = frv_fpga_end,
+ .mask = frv_fpga_mask,
+ .mask_ack = frv_fpga_mask_ack,
+ .unmask = frv_fpga_unmask,
};
/*
static irqreturn_t fpga_interrupt(int irq, void *_mask, struct pt_regs *regs)
{
uint16_t imr, mask = (unsigned long) _mask;
- irqreturn_t iret = 0;
imr = __get_IMR();
mask = mask & ~imr & __get_IFR();
irq = 31 - irq;
mask &= ~(1 << irq);
- if (__do_IRQ(IRQ_BASE_FPGA + irq, regs))
- iret |= IRQ_HANDLED;
+ generic_handle_irq(IRQ_BASE_FPGA + irq, regs);
}
- return iret;
+ return IRQ_HANDLED;
}
/*
/*
* off-CPU FPGA PIC operations
*/
-static void frv_fpga_enable(unsigned int irq)
+static void frv_fpga_mask(unsigned int irq)
{
uint16_t imr = __get_IMR();
- imr &= ~(1 << (irq - IRQ_BASE_FPGA));
-
+ imr |= 1 << (irq - IRQ_BASE_FPGA);
__set_IMR(imr);
}
-static void frv_fpga_disable(unsigned int irq)
+static void frv_fpga_ack(unsigned int irq)
+{
+ __clr_IFR(1 << (irq - IRQ_BASE_FPGA));
+}
+
+static void frv_fpga_mask_ack(unsigned int irq)
{
uint16_t imr = __get_IMR();
imr |= 1 << (irq - IRQ_BASE_FPGA);
-
__set_IMR(imr);
-}
-static void frv_fpga_ack(unsigned int irq)
-{
__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
}
-static void frv_fpga_end(unsigned int irq)
+static void frv_fpga_unmask(unsigned int irq)
{
+ uint16_t imr = __get_IMR();
+
+ imr &= ~(1 << (irq - IRQ_BASE_FPGA));
+
+ __set_IMR(imr);
}
static struct irq_chip frv_fpga_pic = {
.name = "mb93093",
- .enable = frv_fpga_enable,
- .disable = frv_fpga_disable,
.ack = frv_fpga_ack,
- .mask = frv_fpga_disable,
- .unmask = frv_fpga_enable,
+ .mask = frv_fpga_mask,
+ .mask_ack = frv_fpga_mask_ack,
+ .unmask = frv_fpga_unmask,
.end = frv_fpga_end,
};
static irqreturn_t fpga_interrupt(int irq, void *_mask, struct pt_regs *regs)
{
uint16_t imr, mask = (unsigned long) _mask;
- irqreturn_t iret = 0;
imr = __get_IMR();
mask = mask & ~imr & __get_IFR();
irq = 31 - irq;
mask &= ~(1 << irq);
- if (__do_IRQ(IRQ_BASE_FPGA + irq, regs))
- iret |= IRQ_HANDLED;
+ generic_irq_handle(IRQ_BASE_FPGA + irq, regs);
}
- return iret;
+ return IRQ_HANDLED;
}
/*
/*
* daughter board PIC operations
+ * - there is no way to ACK interrupts in the MB93493 chip
*/
-static void frv_mb93493_enable(unsigned int irq)
+static void frv_mb93493_mask(unsigned int irq)
{
uint32_t iqsr;
volatile void *piqsr;
piqsr = __addr_MB93493_IQSR(0);
iqsr = readl(piqsr);
- iqsr |= 1 << (irq - IRQ_BASE_MB93493 + 16);
+ iqsr &= ~(1 << (irq - IRQ_BASE_MB93493 + 16));
writel(iqsr, piqsr);
}
-static void frv_mb93493_disable(unsigned int irq)
+static void frv_mb93493_ack(unsigned int irq)
+{
+}
+
+static void frv_mb93493_unmask(unsigned int irq)
{
uint32_t iqsr;
volatile void *piqsr;
piqsr = __addr_MB93493_IQSR(0);
iqsr = readl(piqsr);
- iqsr &= ~(1 << (irq - IRQ_BASE_MB93493 + 16));
+ iqsr |= 1 << (irq - IRQ_BASE_MB93493 + 16);
writel(iqsr, piqsr);
}
-static void frv_mb93493_ack(unsigned int irq)
-{
-}
-
-static void frv_mb93493_end(unsigned int irq)
-{
-}
-
static struct irq_chip frv_mb93493_pic = {
.name = "mb93093",
- .enable = frv_mb93493_enable,
- .disable = frv_mb93493_disable,
.ack = frv_mb93493_ack,
- .mask = frv_mb93493_disable,
- .unmask = frv_mb93493_enable,
- .end = frv_mb93493_end,
+ .mask = frv_mb93493_mask,
+ .mask_ack = frv_mb93493_mask,
+ .unmask = frv_mb93493_unmask,
};
/*
static irqreturn_t mb93493_interrupt(int irq, void *_piqsr, struct pt_regs *regs)
{
volatile void *piqsr = _piqsr;
- irqreturn_t iret = 0;
uint32_t iqsr;
iqsr = readl(piqsr);
irq = 31 - irq;
iqsr &= ~(1 << irq);
- if (__do_IRQ(IRQ_BASE_MB93493 + irq, regs))
- iret |= IRQ_HANDLED;
+ generic_handle_irq(IRQ_BASE_MB93493 + irq, regs);
}
- return iret;
+ return IRQ_HANDLED;
}
/*
/*
* on-CPU PIC operations
*/
-static void frv_cpupic_enable(unsigned int irqlevel)
-{
- __clr_MASK(irqlevel);
-}
-
-static void frv_cpupic_disable(unsigned int irqlevel)
-{
- __set_MASK(irqlevel);
-}
-
static void frv_cpupic_ack(unsigned int irqlevel)
{
- __set_MASK(irqlevel);
__clr_RC(irqlevel);
__clr_IRL();
}
static struct irq_chip frv_cpu_pic = {
.name = "cpu",
- .enable = frv_cpupic_enable,
- .disable = frv_cpupic_disable,
.ack = frv_cpupic_ack,
.mask = frv_cpupic_mask,
.mask_ack = frv_cpupic_mask_ack,
asmlinkage void do_IRQ(void)
{
irq_enter();
- __do_IRQ(__get_IRL(), __frame);
+ generic_handle_irq(__get_IRL(), __frame);
irq_exit();
}