can: flexcan: flexcan_set_bittiming(): move setup of CAN-2.0 bitiming into separate...

This is a patch prepares for the CAN-FD support. In a later patch the
setup for canfd bittiming will be added, with this patch the change is
easier to read.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20200922144429.2613631-14-mkl@pengutronix.de

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 35d0fa59e9574851ad4129f8fa492a97430a1d24..a9908deae411a398c53f2074846bbf6bc0d20224 100644 (file)
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -1037,7 +1037,7 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
        return handled;
 }
 
-static void flexcan_set_bittiming(struct net_device *dev)
+static void flexcan_set_bittiming_ctrl(const struct net_device *dev)
 {
        const struct flexcan_priv *priv = netdev_priv(dev);
        const struct can_bittiming *bt = &priv->can.bittiming;
@@ -1049,10 +1049,7 @@ static void flexcan_set_bittiming(struct net_device *dev)
                 FLEXCAN_CTRL_RJW(0x3) |
                 FLEXCAN_CTRL_PSEG1(0x7) |
                 FLEXCAN_CTRL_PSEG2(0x7) |
-                FLEXCAN_CTRL_PROPSEG(0x7) |
-                FLEXCAN_CTRL_LPB |
-                FLEXCAN_CTRL_SMP |
-                FLEXCAN_CTRL_LOM);
+                FLEXCAN_CTRL_PROPSEG(0x7));
 
        reg |= FLEXCAN_CTRL_PRESDIV(bt->brp - 1) |
                FLEXCAN_CTRL_PSEG1(bt->phase_seg1 - 1) |
@@ -1060,6 +1057,24 @@ static void flexcan_set_bittiming(struct net_device *dev)
                FLEXCAN_CTRL_RJW(bt->sjw - 1) |
                FLEXCAN_CTRL_PROPSEG(bt->prop_seg - 1);
 
+       netdev_dbg(dev, "writing ctrl=0x%08x\n", reg);
+       priv->write(reg, &regs->ctrl);
+
+       /* print chip status */
+       netdev_dbg(dev, "%s: mcr=0x%08x ctrl=0x%08x\n", __func__,
+                  priv->read(&regs->mcr), priv->read(&regs->ctrl));
+}
+
+static void flexcan_set_bittiming(struct net_device *dev)
+{
+       const struct flexcan_priv *priv = netdev_priv(dev);
+       struct flexcan_regs __iomem *regs = priv->regs;
+       u32 reg;
+
+       reg = priv->read(&regs->ctrl);
+       reg &= ~(FLEXCAN_CTRL_LPB | FLEXCAN_CTRL_SMP |
+                FLEXCAN_CTRL_LOM);
+
        if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)
                reg |= FLEXCAN_CTRL_LPB;
        if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
@@ -1070,9 +1085,7 @@ static void flexcan_set_bittiming(struct net_device *dev)
        netdev_dbg(dev, "writing ctrl=0x%08x\n", reg);
        priv->write(reg, &regs->ctrl);
 
-       /* print chip status */
-       netdev_dbg(dev, "%s: mcr=0x%08x ctrl=0x%08x\n", __func__,
-                  priv->read(&regs->mcr), priv->read(&regs->ctrl));
+       return flexcan_set_bittiming_ctrl(dev);
 }
 
 /* flexcan_chip_start