drm: zte: do not enable clock auto-gating by default

Some VOU modules do not work well with clock auto-gating.  For example,
VGA I2C bus will fail to read EDID data from monitor.  Let's not enable
this feature by default, and leave it to the possible future low-power
optimization.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1491490870-6330-2-git-send-email-shawnguo@kernel.org

diff --git a/drivers/gpu/drm/zte/zx_vou.c b/drivers/gpu/drm/zte/zx_vou.c
index b500c8dd0d9d697612f07a851fab4e784f23f8a1..5145215b46008c5b4f819c3295a23ef2f4fc4f87 100644 (file)
--- a/drivers/gpu/drm/zte/zx_vou.c
+++ b/drivers/gpu/drm/zte/zx_vou.c
@@ -705,9 +705,6 @@ static void vou_hw_init(struct zx_vou_hw *vou)
        /* Release reset for all VOU modules */
        zx_writel(vou->vouctl + VOU_SOFT_RST, ~0);
 
-       /* Enable clock auto-gating for all VOU modules */
-       zx_writel(vou->vouctl + VOU_CLK_REQEN, ~0);
-
        /* Enable all VOU module clocks */
        zx_writel(vou->vouctl + VOU_CLK_EN, ~0);