ARM: dts: sun8i-a33: Add Video Engine and reserved memory nodes

This adds nodes for the Video Engine and the associated reserved memory
for the A33. Up to 96 MiB of memory are dedicated to the CMA pool.

The VPU can only map the first 256 MiB of DRAM, so the reserved memory
pool has to be located in that area. Following Allwinner's decision in
downstream software, the last 96 MiB of the first 256 MiB of RAM are
reserved for this purpose.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 4e92741b24a70e222992f977e94d4f09d4486f41..c1cc8f09dd9abe054ae2e80cf38274ae4fbf25e1 100644 (file)
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -190,6 +190,21 @@
                reg = <0x40000000 0x80000000>;
        };
 
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               /* Address must be kept in the lower 256 MiBs of DRAM for VE. */
+               cma_pool: cma@4a000000 {
+                       compatible = "shared-dma-pool";
+                       size = <0x6000000>;
+                       alloc-ranges = <0x4a000000 0x6000000>;
+                       reusable;
+                       linux,cma-default;
+               };
+       };
+
        sound: sound {
                compatible = "simple-audio-card";
                simple-audio-card,name = "sun8i-a33-audio";
@@ -254,6 +269,17 @@
                        };
                };
 
+               video-codec@01c0e000 {
+                       compatible = "allwinner,sun8i-a33-video-engine";
+                       reg = <0x01c0e000 0x1000>;
+                       clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+                                <&ccu CLK_DRAM_VE>;
+                       clock-names = "ahb", "mod", "ram";
+                       resets = <&ccu RST_BUS_VE>;
+                       interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+                       allwinner,sram = <&ve_sram 1>;
+               };
+
                crypto: crypto-engine@1c15000 {
                        compatible = "allwinner,sun4i-a10-crypto";
                        reg = <0x01c15000 0x1000>;