PCI/ASPM: Disable ASPM L1.2 Substate if we don't have LTR

BugLink: http://bugs.launchpad.net/bugs/1815234
[ Upstream commit 9ab105deb60fa76d66cae5548819b4e8703d2056 ]

When in the ASPM L1.0 state (but not the PCI-PM L1.0 state), the most
recent LTR value and the LTR_L1.2_THRESHOLD determines whether the link
enters the L1.2 substate.

If we don't have LTR enabled, prevent the use of ASPM L1.2.

PCI-PM L1.2 may still be used because it doesn't depend on
LTR_L1.2_THRESHOLD (see PCIe r4.0, sec 5.5.1).

Tested-by: Srinath Mannam <srinath.mannam@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 3b9b4d50cd988198b877e1acc91685c26ab90002..88b419835d189ac351c279486ea659e87371025b 100644 (file)
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -384,6 +384,15 @@ static void pcie_get_aspm_reg(struct pci_dev *pdev,
                info->l1ss_cap = 0;
                return;
        }
+
+       /*
+        * If we don't have LTR for the entire path from the Root Complex
+        * to this device, we can't use ASPM L1.2 because it relies on the
+        * LTR_L1.2_THRESHOLD.  See PCIe r4.0, secs 5.5.4, 6.18.
+        */
+       if (!pdev->ltr_path)
+               info->l1ss_cap &= ~PCI_L1SS_CAP_ASPM_L1_2;
+
        pci_read_config_dword(pdev, info->l1ss_cap_ptr + PCI_L1SS_CTL1,
                              &info->l1ss_ctl1);
        pci_read_config_dword(pdev, info->l1ss_cap_ptr + PCI_L1SS_CTL2,