]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
can: flexcan: assert FRZ bit in flexcan_chip_freeze()
authorJoakim Zhang <qiangqing.zhang@nxp.com>
Thu, 18 Feb 2021 11:00:35 +0000 (19:00 +0800)
committerSeth Forshee <seth.forshee@canonical.com>
Wed, 17 Mar 2021 18:37:37 +0000 (13:37 -0500)
BugLink: https://bugs.launchpad.net/bugs/1919492
commit 449052cfebf624b670faa040245d3feed770d22f upstream.

Assert HALT bit to enter freeze mode, there is a premise that FRZ bit is
asserted. This patch asserts FRZ bit in flexcan_chip_freeze, although
the reset value is 1b'1. This is a prepare patch, later patch will
invoke flexcan_chip_freeze() to enter freeze mode, which polling freeze
mode acknowledge.

Fixes: b1aa1c7a2165b ("can: flexcan: fix transition from and to freeze mode in chip_{,un}freeze")
Link: https://lore.kernel.org/r/20210218110037.16591-2-qiangqing.zhang@nxp.com
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Seth Forshee <seth.forshee@canonical.com>
drivers/net/can/flexcan.c

index 7ab20a6b0d1dbbcb11e64161d2835645daad87bf..cb7a1ea4862ced6b9210d1dfc27b2dfed894b652 100644 (file)
@@ -701,7 +701,7 @@ static int flexcan_chip_freeze(struct flexcan_priv *priv)
        u32 reg;
 
        reg = priv->read(&regs->mcr);
-       reg |= FLEXCAN_MCR_HALT;
+       reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT;
        priv->write(reg, &regs->mcr);
 
        while (timeout-- && !(priv->read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK))