drm/amd/display: disable otg toggle w/a on boot

This w/a has a bad interaction with seamless boot toggling an
active stream. Most panels recover, however some fail leading
to display corruption.

Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
index f4381725b21072f0a018757f4511b80318e7b2f1..36b0cd47c1c74a4a877ba734736040305c816113 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
@@ -173,11 +173,14 @@ static void dcn315_update_clocks(struct clk_mgr *clk_mgr_base,
        }
 
        if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) {
-               dcn315_disable_otg_wa(clk_mgr_base, true);
+               /* No need to apply the w/a if we haven't taken over from bios yet */
+               if (clk_mgr_base->clks.dispclk_khz)
+                       dcn315_disable_otg_wa(clk_mgr_base, true);
 
                clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;
                dcn315_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz);
-               dcn315_disable_otg_wa(clk_mgr_base, false);
+               if (clk_mgr_base->clks.dispclk_khz)
+                       dcn315_disable_otg_wa(clk_mgr_base, false);
 
                update_dispclk = true;
        }