ARM: davinci: clk: add set_parent callback for mux clocks

Introduce a set_parent callback that will be used for mux clocks, such as
the USB PHY muxes and the async3 clock domain mux.

Signed-off-by: David Lechner <david@lechnology.com>
[nsekhar@ti.com: checkpatch fixes]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 3424eac6b588c1bf3304d632b9af26ba45e24441..34b4f9fda35d1903a9cd674061c463a6c95a36f0 100644 (file)
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -195,6 +195,14 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
                return -EINVAL;
 
        mutex_lock(&clocks_mutex);
+       if (clk->set_parent) {
+               int ret = clk->set_parent(clk, parent);
+
+               if (ret) {
+                       mutex_unlock(&clocks_mutex);
+                       return ret;
+               }
+       }
        clk->parent = parent;
        list_del_init(&clk->childnode);
        list_add(&clk->childnode, &clk->parent->children);
@@ -224,8 +232,17 @@ int clk_register(struct clk *clk)
 
        mutex_lock(&clocks_mutex);
        list_add_tail(&clk->node, &clocks);
-       if (clk->parent)
+       if (clk->parent) {
+               if (clk->set_parent) {
+                       int ret = clk->set_parent(clk, clk->parent);
+
+                       if (ret) {
+                               mutex_unlock(&clocks_mutex);
+                               return ret;
+                       }
+               }
                list_add_tail(&clk->childnode, &clk->parent->children);
+       }
        mutex_unlock(&clocks_mutex);
 
        /* If rate is already set, use it */

diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 1e4e836173a14cab56650945cd2fcd41e18cf014..e2a5437a1aee3c017f4f353410e0f0e314a96274 100644 (file)
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -106,6 +106,7 @@ struct clk {
        int (*reset) (struct clk *clk, bool reset);
        void (*clk_enable) (struct clk *clk);
        void (*clk_disable) (struct clk *clk);
+       int (*set_parent) (struct clk *clk, struct clk *parent);
 };
 
 /* Clock flags: SoC-specific flags start at BIT(16) */