drm/amd/display: Fix ODM combine issue with fast boot

[Why]
When systme power up and eDP lit up by VBIOS,
in the core_link_enable_stream(),
the function will early return due to apply
apply_edp_fast_boot_optimization,
resulting the DP_PIXEL_COMBINE cannot get set
in enc3_dp_set_odm_combine.

[How]
Check ODM PIPE to avoid early return.

Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Danny Wang <danny.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 8f23c160f291809f4b69cc6d413b16d20283097b..3d08f8eba402e67614a240f09fd58fe70cece860 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -4285,7 +4285,8 @@ void core_link_enable_stream(
                /* eDP lit up by bios already, no need to enable again. */
                if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&
                                        apply_edp_fast_boot_optimization &&
-                                       !pipe_ctx->stream->timing.flags.DSC) {
+                                       !pipe_ctx->stream->timing.flags.DSC &&
+                                       !pipe_ctx->next_odm_pipe) {
                        pipe_ctx->stream->dpms_off = false;
 #if defined(CONFIG_DRM_AMD_DC_HDCP)
                        update_psp_stream_config(pipe_ctx, false);