drm/amd/display: add DPCD read for Sink ieee OUI

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 7857cb42b3e62e5603af2408128e4cefb6531a0c..1a42ee5113a920dcd182780f7a46c762be325ae3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2305,6 +2305,7 @@ static bool retrieve_link_cap(struct dc_link *link)
 {
        uint8_t dpcd_data[DP_ADAPTER_CAP - DP_DPCD_REV + 1];
 
+       struct dp_device_vendor_id sink_id;
        union down_stream_port_count down_strm_port_count;
        union edp_configuration_cap edp_config_cap;
        union dp_downstream_port_present ds_port = { 0 };
@@ -2391,6 +2392,17 @@ static bool retrieve_link_cap(struct dc_link *link)
                        &link->dpcd_caps.sink_count.raw,
                        sizeof(link->dpcd_caps.sink_count.raw));
 
+       /* read sink ieee oui */
+       core_link_read_dpcd(link,
+                       DP_SINK_OUI,
+                       (uint8_t *)(&sink_id),
+                       sizeof(sink_id));
+
+       link->dpcd_caps.sink_dev_id =
+                       (sink_id.ieee_oui[0] << 16) +
+                       (sink_id.ieee_oui[1] << 8) +
+                       (sink_id.ieee_oui[2]);
+
        /* Connectivity log: detection */
        CONN_DATA_DETECT(link, dpcd_data, sizeof(dpcd_data), "Rx Caps: ");