static uint32_t PPC_intack_readw (void *opaque, target_phys_addr_t addr)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- return bswap16(_PPC_intack_read(addr));
-#else
return _PPC_intack_read(addr);
-#endif
}
static uint32_t PPC_intack_readl (void *opaque, target_phys_addr_t addr)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- return bswap32(_PPC_intack_read(addr));
-#else
return _PPC_intack_read(addr);
-#endif
}
static CPUWriteMemoryFunc * const PPC_intack_write[] = {
static void PPC_XCSR_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap16(value);
-#endif
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
value);
}
static void PPC_XCSR_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap32(value);
-#endif
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
value);
}
printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,
retval);
-#ifdef TARGET_WORDS_BIGENDIAN
- retval = bswap16(retval);
-#endif
return retval;
}
printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,
retval);
-#ifdef TARGET_WORDS_BIGENDIAN
- retval = bswap32(retval);
-#endif
return retval;
}
sysctrl_t *sysctrl = opaque;
addr = prep_IO_address(sysctrl, addr);
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap16(value);
-#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
cpu_outw(addr, value);
}
addr = prep_IO_address(sysctrl, addr);
ret = cpu_inw(addr);
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = bswap16(ret);
-#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " <= 0x%08" PRIx32 "\n", addr, ret);
return ret;
sysctrl_t *sysctrl = opaque;
addr = prep_IO_address(sysctrl, addr);
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap32(value);
-#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
cpu_outl(addr, value);
}
addr = prep_IO_address(sysctrl, addr);
ret = cpu_inl(addr);
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = bswap32(ret);
-#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " <= 0x%08" PRIx32 "\n", addr, ret);
return ret;
/* Register 8 MB of ISA IO space (needed for non-contiguous map) */
PPC_io_memory = cpu_register_io_memory(PPC_prep_io_read,
PPC_prep_io_write, sysctrl,
- DEVICE_NATIVE_ENDIAN);
+ DEVICE_LITTLE_ENDIAN);
cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
/* init basic PC hardware */
/* PCI intack location */
PPC_io_memory = cpu_register_io_memory(PPC_intack_read,
PPC_intack_write, NULL,
- DEVICE_NATIVE_ENDIAN);
+ DEVICE_LITTLE_ENDIAN);
cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory);
/* PowerPC control and status register group */
#if 0
PPC_io_memory = cpu_register_io_memory(PPC_XCSR_read, PPC_XCSR_write,
- NULL, DEVICE_NATIVE_ENDIAN);
+ NULL, DEVICE_LITTLE_ENDIAN);
cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory);
#endif