]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
arm_pmu: Clean up maximum period handling
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Tue, 10 Jul 2018 08:57:58 +0000 (09:57 +0100)
committerWill Deacon <will.deacon@arm.com>
Tue, 10 Jul 2018 17:19:02 +0000 (18:19 +0100)
Each PMU defines their max_period of the counter as the maximum
value that can be counted. Since all the PMU backends support
32bit counters by default, let us remove the redundant field.

No functional changes.

Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm/kernel/perf_event_v6.c
arch/arm/kernel/perf_event_v7.c
arch/arm/kernel/perf_event_xscale.c
arch/arm64/kernel/perf_event.c
drivers/perf/arm_pmu.c
include/linux/perf/arm_pmu.h

index be42c4f66a40f8ef3c547fd11077fd72b90e5330..f64a6bfebcec23fc769fea4d4fff58fd0dfd896f 100644 (file)
@@ -495,7 +495,6 @@ static void armv6pmu_init(struct arm_pmu *cpu_pmu)
        cpu_pmu->stop           = armv6pmu_stop;
        cpu_pmu->map_event      = armv6_map_event;
        cpu_pmu->num_events     = 3;
-       cpu_pmu->max_period     = (1LLU << 32) - 1;
 }
 
 static int armv6_1136_pmu_init(struct arm_pmu *cpu_pmu)
@@ -546,7 +545,6 @@ static int armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)
        cpu_pmu->stop           = armv6pmu_stop;
        cpu_pmu->map_event      = armv6mpcore_map_event;
        cpu_pmu->num_events     = 3;
-       cpu_pmu->max_period     = (1LLU << 32) - 1;
 
        return 0;
 }
index 5a5116794440ea19fdfe1d38465210c1437956f9..2cf1ca2925c819122222cc95e069eb4d12c6cc75 100644 (file)
@@ -1170,7 +1170,6 @@ static void armv7pmu_init(struct arm_pmu *cpu_pmu)
        cpu_pmu->start          = armv7pmu_start;
        cpu_pmu->stop           = armv7pmu_stop;
        cpu_pmu->reset          = armv7pmu_reset;
-       cpu_pmu->max_period     = (1LLU << 32) - 1;
 };
 
 static void armv7_read_num_pmnc_events(void *info)
index 88d1a76f536708f0ca46843205d84855d3c78141..c4f029458b523984da733fac4405dffacf7fce45 100644 (file)
@@ -374,7 +374,6 @@ static int xscale1pmu_init(struct arm_pmu *cpu_pmu)
        cpu_pmu->stop           = xscale1pmu_stop;
        cpu_pmu->map_event      = xscale_map_event;
        cpu_pmu->num_events     = 3;
-       cpu_pmu->max_period     = (1LLU << 32) - 1;
 
        return 0;
 }
@@ -743,7 +742,6 @@ static int xscale2pmu_init(struct arm_pmu *cpu_pmu)
        cpu_pmu->stop           = xscale2pmu_stop;
        cpu_pmu->map_event      = xscale_map_event;
        cpu_pmu->num_events     = 5;
-       cpu_pmu->max_period     = (1LLU << 32) - 1;
 
        return 0;
 }
index 33147aacdafd67009f3f331f410d5add4524babe..678ecffd37247f0b90680177b7e0b43283a21baf 100644 (file)
@@ -960,7 +960,6 @@ static int armv8_pmu_init(struct arm_pmu *cpu_pmu)
        cpu_pmu->start                  = armv8pmu_start,
        cpu_pmu->stop                   = armv8pmu_stop,
        cpu_pmu->reset                  = armv8pmu_reset,
-       cpu_pmu->max_period             = (1LLU << 32) - 1,
        cpu_pmu->set_event_filter       = armv8pmu_set_event_filter;
 
        return 0;
index a6347d4876356c09338c99d4bd9a2fb414e9e590..6ddc00da5373604b74d2a069981b4f126c46a7a3 100644 (file)
 static DEFINE_PER_CPU(struct arm_pmu *, cpu_armpmu);
 static DEFINE_PER_CPU(int, cpu_irq);
 
+static inline u64 arm_pmu_max_period(void)
+{
+       return (1ULL << 32) - 1;
+}
+
 static int
 armpmu_map_cache_event(const unsigned (*cache_map)
                                      [PERF_COUNT_HW_CACHE_MAX]
@@ -114,8 +119,10 @@ int armpmu_event_set_period(struct perf_event *event)
        struct hw_perf_event *hwc = &event->hw;
        s64 left = local64_read(&hwc->period_left);
        s64 period = hwc->sample_period;
+       u64 max_period;
        int ret = 0;
 
+       max_period = arm_pmu_max_period();
        if (unlikely(left <= -period)) {
                left = period;
                local64_set(&hwc->period_left, left);
@@ -136,8 +143,8 @@ int armpmu_event_set_period(struct perf_event *event)
         * effect we are reducing max_period to account for
         * interrupt latency (and we are being very conservative).
         */
-       if (left > (armpmu->max_period >> 1))
-               left = armpmu->max_period >> 1;
+       if (left > (max_period >> 1))
+               left = (max_period >> 1);
 
        local64_set(&hwc->prev_count, (u64)-left);
 
@@ -153,6 +160,7 @@ u64 armpmu_event_update(struct perf_event *event)
        struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
        struct hw_perf_event *hwc = &event->hw;
        u64 delta, prev_raw_count, new_raw_count;
+       u64 max_period = arm_pmu_max_period();
 
 again:
        prev_raw_count = local64_read(&hwc->prev_count);
@@ -162,7 +170,7 @@ again:
                             new_raw_count) != prev_raw_count)
                goto again;
 
-       delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
+       delta = (new_raw_count - prev_raw_count) & max_period;
 
        local64_add(delta, &event->count);
        local64_sub(delta, &hwc->period_left);
@@ -402,7 +410,7 @@ __hw_perf_event_init(struct perf_event *event)
                 * is far less likely to overtake the previous one unless
                 * you have some serious IRQ latency issues.
                 */
-               hwc->sample_period  = armpmu->max_period >> 1;
+               hwc->sample_period  = arm_pmu_max_period() >> 1;
                hwc->last_period    = hwc->sample_period;
                local64_set(&hwc->period_left, hwc->sample_period);
        }
index ad5444491975c0b990b5092d023b5f158641fd75..12c30a22fc8d9c9b91c1ee77b979849674ef8384 100644 (file)
@@ -94,7 +94,6 @@ struct arm_pmu {
        void            (*reset)(void *);
        int             (*map_event)(struct perf_event *event);
        int             num_events;
-       u64             max_period;
        bool            secure_access; /* 32-bit ARM only */
 #define ARMV8_PMUV3_MAX_COMMON_EVENTS 0x40
        DECLARE_BITMAP(pmceid_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS);