]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
spi: mediatek: Fix fifo transfer
authorGuenter Roeck <linux@roeck-us.net>
Mon, 2 Aug 2021 03:00:23 +0000 (20:00 -0700)
committerStefan Bader <stefan.bader@canonical.com>
Mon, 20 Sep 2021 13:42:40 +0000 (15:42 +0200)
BugLink: https://bugs.launchpad.net/bugs/1942123
commit 0d5c3954b35eddff0da0436c31e8d721eceb7dc2 upstream.

Commit 3a70dd2d0503 ("spi: mediatek: fix fifo rx mode") claims that
fifo RX mode was never handled, and adds the presumably missing code
to the FIFO transfer function. However, the claim that receive data
was not handled is incorrect. It was handled as part of interrupt
handling after the transfer was complete. The code added with the above
mentioned commit reads data from the receive FIFO before the transfer
is started, which is wrong. This results in an actual transfer error
on a Hayato Chromebook.

Remove the code trying to handle receive data before the transfer is
started to fix the problem.

Fixes: 3a70dd2d0503 ("spi: mediatek: fix fifo rx mode")
Cc: Peter Hess <peter.hess@ph-home.de>
Cc: Frank Wunderlich <frank-w@public-files.de>
Cc: Tzung-Bi Shih <tzungbi@google.com>
Cc: Hsin-Yi Wang <hsinyi@google.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Hsin-Yi Wang <hsinyi@google.com>
Tested-by: Tzung-Bi Shih <tzungbi@google.com>
Link: https://lore.kernel.org/r/20210802030023.1748777-1-linux@roeck-us.net
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
drivers/spi/spi-mt65xx.c

index 8f2d112f0b5d44c383b1cb9cda05f53e4f1c300f..83e56ee62649d445ea08b05b99a54059e17264f7 100644 (file)
@@ -433,24 +433,15 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
        mtk_spi_prepare_transfer(master, xfer);
        mtk_spi_setup_packet(master);
 
-       cnt = xfer->len / 4;
-       if (xfer->tx_buf)
+       if (xfer->tx_buf) {
+               cnt = xfer->len / 4;
                iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
-
-       if (xfer->rx_buf)
-               ioread32_rep(mdata->base + SPI_RX_DATA_REG, xfer->rx_buf, cnt);
-
-       remainder = xfer->len % 4;
-       if (remainder > 0) {
-               reg_val = 0;
-               if (xfer->tx_buf) {
+               remainder = xfer->len % 4;
+               if (remainder > 0) {
+                       reg_val = 0;
                        memcpy(&reg_val, xfer->tx_buf + (cnt * 4), remainder);
                        writel(reg_val, mdata->base + SPI_TX_DATA_REG);
                }
-               if (xfer->rx_buf) {
-                       reg_val = readl(mdata->base + SPI_RX_DATA_REG);
-                       memcpy(xfer->rx_buf + (cnt * 4), &reg_val, remainder);
-               }
        }
 
        mtk_spi_enable_transfer(master);