#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
+#include <linux/pm_qos.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>
.fifo_depth = 32,
.reg_offset = 0,
.mclk0_is_mclk1 = false,
+ .flags = 0,
};
static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = {
.fifo_depth = 32,
.reg_offset = 0,
.mclk0_is_mclk1 = true,
+ .flags = 0,
};
static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = {
.fifo_depth = 16,
.reg_offset = 8,
.mclk0_is_mclk1 = false,
+ .flags = PMQOS_CPU_LATENCY,
};
static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = {
.fifo_depth = 128,
.reg_offset = 8,
.mclk0_is_mclk1 = false,
+ .flags = 0,
};
static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = {
.fifo_depth = 64,
.reg_offset = 0,
.mclk0_is_mclk1 = false,
+ .flags = 0,
};
static const struct of_device_id fsl_sai_ids[] = {
clk_disable_unprepare(sai->bus_clk);
+ if (sai->soc_data->flags & PMQOS_CPU_LATENCY)
+ cpu_latency_qos_remove_request(&sai->pm_qos_req);
+
regcache_cache_only(sai->regmap, true);
return 0;
goto disable_tx_clk;
}
+ if (sai->soc_data->flags & PMQOS_CPU_LATENCY)
+ cpu_latency_qos_add_request(&sai->pm_qos_req, 0);
+
regcache_cache_only(sai->regmap, false);
regcache_mark_dirty(sai->regmap);
regmap_write(sai->regmap, FSL_SAI_TCSR(ofs), FSL_SAI_CSR_SR);
#define FSL_SAI_MAXBURST_TX 6
#define FSL_SAI_MAXBURST_RX 6
+#define PMQOS_CPU_LATENCY BIT(0)
+
struct fsl_sai_soc_data {
bool use_imx_pcm;
bool use_edma;
bool mclk0_is_mclk1;
unsigned int fifo_depth;
unsigned int reg_offset;
+ unsigned int flags;
};
/**
struct snd_dmaengine_dai_dma_data dma_params_tx;
struct fsl_sai_verid verid;
struct fsl_sai_param param;
+ struct pm_qos_request pm_qos_req;
};
#define TX 1