net: phy: Add 10-BaseT1L registers

The 802.3gc specification defines the 10-BaseT1L link
mode for ethernet trafic on twisted wire pair.

PMA status register can be used to detect if the phy supports
2.4 V TX level and PCS control register can be used to
enable/disable PCS level loopback.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
index c54e6eae5366f673bf77148169ec6ec04332d253..0b2eba36dd7ca5054563c27bf4fffea7a97cd6fb 100644 (file)
--- a/include/uapi/linux/mdio.h
+++ b/include/uapi/linux/mdio.h
@@ -67,6 +67,9 @@
 #define MDIO_PCS_10GBRT_STAT2  33      /* 10GBASE-R/-T PCS status 2 */
 #define MDIO_AN_10GBT_CTRL     32      /* 10GBASE-T auto-negotiation control */
 #define MDIO_AN_10GBT_STAT     33      /* 10GBASE-T auto-negotiation status */
+#define MDIO_B10L_PMA_CTRL     2294    /* 10BASE-T1L PMA control */
+#define MDIO_PMA_10T1L_STAT    2295    /* 10BASE-T1L PMA status */
+#define MDIO_PCS_10T1L_CTRL    2278    /* 10BASE-T1L PCS control */
 
 /* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */
 #define MDIO_PMA_LASI_RXCTRL   0x9000  /* RX_ALARM control */
@@ -268,6 +271,28 @@
 #define MDIO_AN_10GBT_STAT_MS          0x4000  /* Master/slave config */
 #define MDIO_AN_10GBT_STAT_MSFLT       0x8000  /* Master/slave config fault */
 
+/* 10BASE-T1L PMA control */
+#define MDIO_PMA_10T1L_CTRL_LB_EN      0x0001  /* Enable loopback mode */
+#define MDIO_PMA_10T1L_CTRL_EEE_EN     0x0400  /* Enable EEE mode */
+#define MDIO_PMA_10T1L_CTRL_LOW_POWER  0x0800  /* Low-power mode */
+#define MDIO_PMA_10T1L_CTRL_2V4_EN     0x1000  /* Enable 2.4 Vpp operating mode */
+#define MDIO_PMA_10T1L_CTRL_TX_DIS     0x4000  /* Transmit disable */
+#define MDIO_PMA_10T1L_CTRL_PMA_RST    0x8000  /* MA reset */
+
+/* 10BASE-T1L PMA status register. */
+#define MDIO_PMA_10T1L_STAT_LINK       0x0001  /* PMA receive link up */
+#define MDIO_PMA_10T1L_STAT_FAULT      0x0002  /* Fault condition detected */
+#define MDIO_PMA_10T1L_STAT_POLARITY   0x0004  /* Receive polarity is reversed */
+#define MDIO_PMA_10T1L_STAT_RECV_FAULT 0x0200  /* Able to detect fault on receive path */
+#define MDIO_PMA_10T1L_STAT_EEE                0x0400  /* PHY has EEE ability */
+#define MDIO_PMA_10T1L_STAT_LOW_POWER  0x0800  /* PMA has low-power ability */
+#define MDIO_PMA_10T1L_STAT_2V4_ABLE   0x1000  /* PHY has 2.4 Vpp operating mode ability */
+#define MDIO_PMA_10T1L_STAT_LB_ABLE    0x2000  /* PHY has loopback ability */
+
+/* 10BASE-T1L PCS control register. */
+#define MDIO_PCS_10T1L_CTRL_LB         0x4000  /* Enable PCS level loopback mode */
+#define MDIO_PCS_10T1L_CTRL_RESET      0x8000  /* PCS reset */
+
 /* EEE Supported/Advertisement/LP Advertisement registers.
  *
  * EEE capability Register (3.20), Advertisement (7.60) and