rtl8xxxu: Update some register definitions

Improve descriptive names of some registers and add some additional
registers only found on nextgen chips.

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>

diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
index e545e849f5a37c573ad31ca4344ce6434d22b062..ade42fe7e74295947bdfc2bf4bfb06b9a8062ef9 100644 (file)
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
@@ -417,13 +417,20 @@
 
 /*  spec version 11 */
 /* 0x0400 ~ 0x047F     Protocol Configuration */
-#define REG_VOQ_INFORMATION            0x0400
-#define REG_VIQ_INFORMATION            0x0404
-#define REG_BEQ_INFORMATION            0x0408
-#define REG_BKQ_INFORMATION            0x040c
-#define REG_MGQ_INFORMATION            0x0410
-#define REG_HGQ_INFORMATION            0x0414
-#define REG_BCNQ_INFORMATION           0x0418
+/* 8192c, 8192d */
+#define REG_VOQ_INFO                   0x0400
+#define REG_VIQ_INFO                   0x0404
+#define REG_BEQ_INFO                   0x0408
+#define REG_BKQ_INFO                   0x040c
+/* 8188e, 8723a, 8812a, 8821a, 8192e, 8723b */
+#define REG_Q0_INFO                    0x400
+#define REG_Q1_INFO                    0x404
+#define REG_Q2_INFO                    0x408
+#define REG_Q3_INFO                    0x40c
+
+#define REG_MGQ_INFO                   0x0410
+#define REG_HGQ_INFO                   0x0414
+#define REG_BCNQ_INFO                  0x0418
 
 #define REG_CPU_MGQ_INFORMATION                0x041c
 #define REG_FWHW_TXQ_CTRL              0x0420
@@ -494,6 +501,9 @@
 #define REG_DATA_SUBCHANNEL            0x0483
 /* 8723au */
 #define REG_INIDATA_RATE_SEL           0x0484
+/* MACID_SLEEP_1/3 for 8723b, 8192e, 8812a, 8821a */
+#define REG_MACID_SLEEP_3_8732B                0x0484
+#define REG_MACID_SLEEP_1_8732B                0x0488
 
 #define REG_POWER_STATUS               0x04a4
 #define REG_POWER_STAGE1               0x04b4
@@ -508,6 +518,13 @@
 #define REG_RTS_MAX_AGGR_NUM           0x04cb
 #define REG_BAR_MODE_CTRL              0x04cc
 #define REG_RA_TRY_RATE_AGG_LMT                0x04cf
+/* MACID_DROP for 8723a */
+#define REG_MACID_DROP_8732A           0x04d0
+/* EARLY_MODE_CONTROL 8188e */
+#define REG_EARLY_MODE_CONTROL_8188E   0x04d0
+/* MACID_SLEEP_2 for 8723b, 8192e, 8812a, 8821a */
+#define REG_MACID_SLEEP_2_8732B                0x04d0
+#define REG_MACID_SLEEP                        0x04d4
 #define REG_NQOS_SEQ                   0x04dc
 #define REG_QOS_SEQ                    0x04de
 #define REG_NEED_CPU_HANDLE            0x04e0