]> git.proxmox.com Git - qemu.git/commitdiff
tcg/arm: implement andc op
authorAurelien Jarno <aurelien@aurel32.net>
Tue, 2 Mar 2010 23:13:43 +0000 (00:13 +0100)
committerAurelien Jarno <aurelien@aurel32.net>
Sat, 13 Mar 2010 10:46:08 +0000 (11:46 +0100)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/arm/tcg-target.c
tcg/arm/tcg-target.h

index e0569c49dc23d5df39aed63b91976ae291964af1..0b943c331b461fb8f16a867b86ec6dff0eed8955 100644 (file)
@@ -1445,6 +1445,9 @@ static inline void tcg_out_op(TCGContext *s, int opc,
     case INDEX_op_and_i32:
         c = ARITH_AND;
         goto gen_arith;
+    case INDEX_op_andc_i32:
+        c = ARITH_BIC;
+        goto gen_arith;
     case INDEX_op_or_i32:
         c = ARITH_ORR;
         goto gen_arith;
@@ -1652,6 +1655,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
     { INDEX_op_div2_i32, { "r", "r", "r", "1", "2" } },
     { INDEX_op_divu2_i32, { "r", "r", "r", "1", "2" } },
     { INDEX_op_and_i32, { "r", "r", "rI" } },
+    { INDEX_op_andc_i32, { "r", "r", "rI" } },
     { INDEX_op_or_i32, { "r", "r", "rI" } },
     { INDEX_op_xor_i32, { "r", "r", "rI" } },
     { INDEX_op_neg_i32, { "r", "r" } },
index ae2ece61dd02a38b6406b242b8434bb9cb48813a..4cad967ec5b595b351fa46be9ef20bb04ae0d37b 100644 (file)
@@ -65,7 +65,7 @@ enum {
 #define TCG_TARGET_HAS_not_i32
 #define TCG_TARGET_HAS_neg_i32
 // #define TCG_TARGET_HAS_rot_i32
-// #define TCG_TARGET_HAS_andc_i32
+#define TCG_TARGET_HAS_andc_i32
 // #define TCG_TARGET_HAS_orc_i32
 
 #define TCG_TARGET_HAS_GUEST_BASE