]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
drm/i915/psr: Handle PSR errors
authorJosé Roberto de Souza <jose.souza@intel.com>
Tue, 26 Jun 2018 20:16:42 +0000 (13:16 -0700)
committerDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Wed, 27 Jun 2018 00:13:05 +0000 (17:13 -0700)
Sink will interrupt source when it have any PSR error.
DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR is a PSR2 but already
handling it here.
The only missing error to be handled is DP_PSR_LINK_CRC_ERROR that
will be taken in care in a futher patch.

v6:
not handling DP_PSR_LINK_CRC_ERROR here

v5:
handling all PSR errors here, so the commit message and
comment have changed

v3:
disabling PSR instead of exiting on error

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180626201644.21932-3-jose.souza@intel.com
drivers/gpu/drm/i915/intel_psr.c

index 445e97dc791d165c0bd86897dc1741128883a1ae..860b46b72403f1a3bbe132915b980588d2ce1e86 100644 (file)
@@ -949,6 +949,8 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
        struct drm_i915_private *dev_priv = to_i915(dev);
        struct i915_psr *psr = &dev_priv->psr;
        u8 val;
+       const u8 errors = DP_PSR_RFB_STORAGE_ERROR |
+                         DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR;
 
        if (!CAN_PSR(dev_priv) || !intel_dp_is_edp(intel_dp))
                return;
@@ -968,7 +970,25 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
                intel_psr_disable_locked(intel_dp);
        }
 
-       /* TODO: handle other PSR/PSR2 errors */
+       if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_ERROR_STATUS, &val) != 1) {
+               DRM_ERROR("PSR_ERROR_STATUS dpcd read failed\n");
+               goto exit;
+       }
+
+       if (val & DP_PSR_RFB_STORAGE_ERROR)
+               DRM_DEBUG_KMS("PSR RFB storage error, disabling PSR\n");
+       if (val & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
+               DRM_DEBUG_KMS("PSR VSC SDP uncorrectable error, disabling PSR\n");
+
+       if (val & ~errors)
+               DRM_ERROR("PSR_ERROR_STATUS unhandled errors %x\n",
+                         val & ~errors);
+       if (val & errors)
+               intel_psr_disable_locked(intel_dp);
+       /* clear status register */
+       drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, val);
+
+       /* TODO: handle PSR2 errors */
 exit:
        mutex_unlock(&psr->lock);
 }