drm/i915/gt: Move SFC lock bits to intel_engine_regs.h

These SFC registers were defined in an unusual way, taking an engine as
a parameter rather than an engine MMIO base offset.  Let's adjust them
to match the style used by other per-engine registers and move them to
intel_engine_regs.h.

While doing this move, we can drop GEN12_HCP_SFC_FORCED_LOCK completely;
it was intended for use in an early version of a hardware workaround,
but was no longer necessary by the time the workaround was finalized.
It is not used anywhere in the driver.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220209051140.1599643-3-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_regs.h b/drivers/gpu/drm/i915/gt/intel_engine_regs.h
index e9fec6214073e69949838bd9be741b98e2d04c4b..cafb078cdb059416e16c6afe295b8b93b1676ffe 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_regs.h
@@ -211,8 +211,25 @@
 #define GEN8_RING_CS_GPR(base, n)              _MMIO((base) + 0x600 + (n) * 8)
 #define GEN8_RING_CS_GPR_UDW(base, n)          _MMIO((base) + 0x600 + (n) * 8 + 4)
 
+#define GEN11_VCS_SFC_FORCED_LOCK(base)                _MMIO((base) + 0x88c)
+#define   GEN11_VCS_SFC_FORCED_LOCK_BIT                (1 << 0)
+#define GEN11_VCS_SFC_LOCK_STATUS(base)                _MMIO((base) + 0x890)
+#define   GEN11_VCS_SFC_USAGE_BIT              (1 << 0)
+#define   GEN11_VCS_SFC_LOCK_ACK_BIT           (1 << 1)
+
+#define GEN11_VECS_SFC_FORCED_LOCK(base)       _MMIO((base) + 0x201c)
+#define   GEN11_VECS_SFC_FORCED_LOCK_BIT       (1 << 0)
+#define GEN11_VECS_SFC_LOCK_ACK(base)          _MMIO((base) + 0x2018)
+#define   GEN11_VECS_SFC_LOCK_ACK_BIT          (1 << 0)
+#define GEN11_VECS_SFC_USAGE(base)             _MMIO((base) + 0x2014)
+#define   GEN11_VECS_SFC_USAGE_BIT             (1 << 0)
+
 #define RING_HWS_PGA_GEN6(base)        _MMIO((base) + 0x2080)
 
+#define GEN12_HCP_SFC_LOCK_STATUS(base)                _MMIO((base) + 0x2914)
+#define   GEN12_HCP_SFC_LOCK_ACK_BIT           REG_BIT(1)
+#define   GEN12_HCP_SFC_USAGE_BIT              REG_BIT(0)
+
 #define VDBOX_CGCTL3F10(base)                  _MMIO((base) + 0x3f10)
 #define   IECPUNIT_CLKGATE_DIS                 REG_BIT(22)
 

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index eff86cc3ceca00d2967e26430555fa73b76d0402..07a5a456bff8f38783b7d11d0b74cdbbd2b52a1a 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -68,25 +68,6 @@
 #define  GEN11_VCS_SFC_RESET_BIT(instance)     (GEN11_GRDOM_SFC0 << ((instance) >> 1))
 #define  GEN11_VECS_SFC_RESET_BIT(instance)    (GEN11_GRDOM_SFC0 << (instance))
 
-#define GEN11_VCS_SFC_FORCED_LOCK(engine)      _MMIO((engine)->mmio_base + 0x88C)
-#define   GEN11_VCS_SFC_FORCED_LOCK_BIT                (1 << 0)
-#define GEN11_VCS_SFC_LOCK_STATUS(engine)      _MMIO((engine)->mmio_base + 0x890)
-#define   GEN11_VCS_SFC_USAGE_BIT              (1 << 0)
-#define   GEN11_VCS_SFC_LOCK_ACK_BIT           (1 << 1)
-
-#define GEN11_VECS_SFC_FORCED_LOCK(engine)     _MMIO((engine)->mmio_base + 0x201C)
-#define   GEN11_VECS_SFC_FORCED_LOCK_BIT       (1 << 0)
-#define GEN11_VECS_SFC_LOCK_ACK(engine)                _MMIO((engine)->mmio_base + 0x2018)
-#define   GEN11_VECS_SFC_LOCK_ACK_BIT          (1 << 0)
-#define GEN11_VECS_SFC_USAGE(engine)           _MMIO((engine)->mmio_base + 0x2014)
-#define   GEN11_VECS_SFC_USAGE_BIT             (1 << 0)
-
-#define GEN12_HCP_SFC_FORCED_LOCK(engine)      _MMIO((engine)->mmio_base + 0x2910)
-#define   GEN12_HCP_SFC_FORCED_LOCK_BIT                REG_BIT(0)
-#define GEN12_HCP_SFC_LOCK_STATUS(engine)      _MMIO((engine)->mmio_base + 0x2914)
-#define   GEN12_HCP_SFC_LOCK_ACK_BIT           REG_BIT(1)
-#define   GEN12_HCP_SFC_USAGE_BIT                      REG_BIT(0)
-
 #define GEN12_SFC_DONE(n)              _MMIO(0x1cc000 + (n) * 0x1000)
 
 #define WAIT_FOR_RC6_EXIT              _MMIO(0x20CC)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 13e3a7b236b363e4cff033f018171984291b03b8..b5dae828499840d542fdf6f4d0ba5e8cf2501143 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -348,25 +348,25 @@ static void get_sfc_forced_lock_data(struct intel_engine_cs *engine,
                MISSING_CASE(engine->class);
                fallthrough;
        case VIDEO_DECODE_CLASS:
-               sfc_lock->lock_reg = GEN11_VCS_SFC_FORCED_LOCK(engine);
+               sfc_lock->lock_reg = GEN11_VCS_SFC_FORCED_LOCK(engine->mmio_base);
                sfc_lock->lock_bit = GEN11_VCS_SFC_FORCED_LOCK_BIT;
 
-               sfc_lock->ack_reg = GEN11_VCS_SFC_LOCK_STATUS(engine);
+               sfc_lock->ack_reg = GEN11_VCS_SFC_LOCK_STATUS(engine->mmio_base);
                sfc_lock->ack_bit  = GEN11_VCS_SFC_LOCK_ACK_BIT;
 
-               sfc_lock->usage_reg = GEN11_VCS_SFC_LOCK_STATUS(engine);
+               sfc_lock->usage_reg = GEN11_VCS_SFC_LOCK_STATUS(engine->mmio_base);
                sfc_lock->usage_bit = GEN11_VCS_SFC_USAGE_BIT;
                sfc_lock->reset_bit = GEN11_VCS_SFC_RESET_BIT(engine->instance);
 
                break;
        case VIDEO_ENHANCEMENT_CLASS:
-               sfc_lock->lock_reg = GEN11_VECS_SFC_FORCED_LOCK(engine);
+               sfc_lock->lock_reg = GEN11_VECS_SFC_FORCED_LOCK(engine->mmio_base);
                sfc_lock->lock_bit = GEN11_VECS_SFC_FORCED_LOCK_BIT;
 
-               sfc_lock->ack_reg = GEN11_VECS_SFC_LOCK_ACK(engine);
+               sfc_lock->ack_reg = GEN11_VECS_SFC_LOCK_ACK(engine->mmio_base);
                sfc_lock->ack_bit  = GEN11_VECS_SFC_LOCK_ACK_BIT;
 
-               sfc_lock->usage_reg = GEN11_VECS_SFC_USAGE(engine);
+               sfc_lock->usage_reg = GEN11_VECS_SFC_USAGE(engine->mmio_base);
                sfc_lock->usage_bit = GEN11_VECS_SFC_USAGE_BIT;
                sfc_lock->reset_bit = GEN11_VECS_SFC_RESET_BIT(engine->instance);
 
@@ -413,7 +413,7 @@ static int gen11_lock_sfc(struct intel_engine_cs *engine,
                 * forced lock on the VE engine that shares the same SFC.
                 */
                if (!(intel_uncore_read_fw(uncore,
-                                          GEN12_HCP_SFC_LOCK_STATUS(engine)) &
+                                          GEN12_HCP_SFC_LOCK_STATUS(engine->mmio_base)) &
                      GEN12_HCP_SFC_USAGE_BIT))
                        return 0;