]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
net: phy: introduce phydev->port
authorMichael Walle <michael@walle.cc>
Tue, 9 Feb 2021 16:38:52 +0000 (17:38 +0100)
committerSeth Forshee <seth.forshee@canonical.com>
Thu, 8 Apr 2021 20:42:39 +0000 (15:42 -0500)
BugLink: https://bugs.launchpad.net/bugs/1922601
[ Upstream commit 4217a64e18a1647a0dbc68cb3169a5a06f054ec8 ]

At the moment, PORT_MII is reported in the ethtool ops. This is odd
because it is an interface between the MAC and the PHY and no external
port. Some network card drivers will overwrite the port to twisted pair
or fiber, though. Even worse, the MDI/MDIX setting is only used by
ethtool if the port is twisted pair.

Set the port to PORT_TP by default because most PHY drivers are copper
ones. If there is fibre support and it is enabled, the PHY driver will
set it to PORT_FIBRE.

This will change reporting PORT_MII to either PORT_TP or PORT_FIBRE;
except for the genphy fallback driver.

Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Seth Forshee <seth.forshee@canonical.com>
drivers/net/phy/broadcom.c
drivers/net/phy/dp83822.c
drivers/net/phy/dp83869.c
drivers/net/phy/lxt.c
drivers/net/phy/marvell.c
drivers/net/phy/marvell10g.c
drivers/net/phy/micrel.c
drivers/net/phy/phy.c
drivers/net/phy/phy_device.c
include/linux/phy.h

index ec45a1608309245531b863c657663f70dcdff5c1..48024ac85980f91078495dff9fa7a0eaf2dce91a 100644 (file)
@@ -505,6 +505,8 @@ static int bcm54616s_probe(struct phy_device *phydev)
                 */
                if (!(val & BCM54616S_100FX_MODE))
                        phydev->dev_flags |= PHY_BCM_FLAGS_MODE_1000BX;
+
+               phydev->port = PORT_FIBRE;
        }
 
        return 0;
index 423952cb9e1cd952ad8a38fe5fa3af691ade08f4..f7a2ec150e542af3ff5ed1cd62a9fdae020868dd 100644 (file)
@@ -555,6 +555,9 @@ static int dp83822_probe(struct phy_device *phydev)
 
        dp83822_of_init(phydev);
 
+       if (dp83822->fx_enabled)
+               phydev->port = PORT_FIBRE;
+
        return 0;
 }
 
index b30bc142d82e5ad65383ff1df92d06fe29e989ad..755220c6451fb0090e4df7af3b002e0ca58c4364 100644 (file)
@@ -855,6 +855,10 @@ static int dp83869_probe(struct phy_device *phydev)
        if (ret)
                return ret;
 
+       if (dp83869->mode == DP83869_RGMII_100_BASE ||
+           dp83869->mode == DP83869_RGMII_1000_BASE)
+               phydev->port = PORT_FIBRE;
+
        return dp83869_config_init(phydev);
 }
 
index 0ee23d29c0d42e5df835f6b698c2d832b0d494dd..bde3356a2f86e25563f62bd38b654152cfadeadf 100644 (file)
@@ -292,6 +292,7 @@ static int lxt973_probe(struct phy_device *phydev)
                phy_write(phydev, MII_BMCR, val);
                /* Remember that the port is in fiber mode. */
                phydev->priv = lxt973_probe;
+               phydev->port = PORT_FIBRE;
        } else {
                phydev->priv = NULL;
        }
index 620052c023a5630d5c5c23a06d226efb18e620e5..2afef45d15b12afbd7be917a9a8ff4ea544612d4 100644 (file)
@@ -1552,6 +1552,7 @@ static int marvell_read_status_page(struct phy_device *phydev, int page)
        phydev->asym_pause = 0;
        phydev->speed = SPEED_UNKNOWN;
        phydev->duplex = DUPLEX_UNKNOWN;
+       phydev->port = fiber ? PORT_FIBRE : PORT_TP;
 
        if (phydev->autoneg == AUTONEG_ENABLE)
                err = marvell_read_status_page_an(phydev, fiber, status);
index 1901ba277413d5ef2da4fa0d0fbf63b186a85cdd..b1bb9b8e1e4edb32399a27d33d04740e578aa5dd 100644 (file)
@@ -631,6 +631,7 @@ static int mv3310_read_status_10gbaser(struct phy_device *phydev)
        phydev->link = 1;
        phydev->speed = SPEED_10000;
        phydev->duplex = DUPLEX_FULL;
+       phydev->port = PORT_FIBRE;
 
        return 0;
 }
@@ -690,6 +691,7 @@ static int mv3310_read_status_copper(struct phy_device *phydev)
 
        phydev->duplex = cssr1 & MV_PCS_CSSR1_DUPLEX_FULL ?
                         DUPLEX_FULL : DUPLEX_HALF;
+       phydev->port = PORT_TP;
        phydev->mdix = cssr1 & MV_PCS_CSSR1_MDIX ?
                       ETH_TP_MDI_X : ETH_TP_MDI;
 
index 57f8021b70af535862c416d5589b7c5050e0eaa3..a6c691938f946594788849382e4bb1e5c1b3707d 100644 (file)
@@ -341,14 +341,19 @@ static int kszphy_config_init(struct phy_device *phydev)
        return kszphy_config_reset(phydev);
 }
 
+static int ksz8041_fiber_mode(struct phy_device *phydev)
+{
+       struct device_node *of_node = phydev->mdio.dev.of_node;
+
+       return of_property_read_bool(of_node, "micrel,fiber-mode");
+}
+
 static int ksz8041_config_init(struct phy_device *phydev)
 {
        __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 
-       struct device_node *of_node = phydev->mdio.dev.of_node;
-
        /* Limit supported and advertised modes in fiber mode */
-       if (of_property_read_bool(of_node, "micrel,fiber-mode")) {
+       if (ksz8041_fiber_mode(phydev)) {
                phydev->dev_flags |= MICREL_PHY_FXEN;
                linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, mask);
                linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, mask);
@@ -1176,6 +1181,9 @@ static int kszphy_probe(struct phy_device *phydev)
                }
        }
 
+       if (ksz8041_fiber_mode(phydev))
+               phydev->port = PORT_FIBRE;
+
        /* Support legacy board-file configuration */
        if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) {
                priv->rmii_ref_clk_sel = true;
index b79c4068ee619dac021fec0b77f6a0b19fb1048d..c93c295db3dc221e8e7971a14a93b0dd1ae291ae 100644 (file)
@@ -310,7 +310,7 @@ void phy_ethtool_ksettings_get(struct phy_device *phydev,
        if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
                cmd->base.port = PORT_BNC;
        else
-               cmd->base.port = PORT_MII;
+               cmd->base.port = phydev->port;
        cmd->base.transceiver = phy_is_internal(phydev) ?
                                XCVR_INTERNAL : XCVR_EXTERNAL;
        cmd->base.phy_address = phydev->mdio.addr;
index 1c6ae845e03f200a9b87e8fb3ed0f8c46a7052bd..d2fd54e4c612359933bfd5816438679c75d79da5 100644 (file)
@@ -576,6 +576,7 @@ struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
        dev->pause = 0;
        dev->asym_pause = 0;
        dev->link = 0;
+       dev->port = PORT_TP;
        dev->interface = PHY_INTERFACE_MODE_GMII;
 
        dev->autoneg = AUTONEG_ENABLE;
@@ -1382,6 +1383,14 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
 
        phydev->state = PHY_READY;
 
+       /* Port is set to PORT_TP by default and the actual PHY driver will set
+        * it to different value depending on the PHY configuration. If we have
+        * the generic PHY driver we can't figure it out, thus set the old
+        * legacy PORT_MII value.
+        */
+       if (using_genphy)
+               phydev->port = PORT_MII;
+
        /* Initial carrier state is off as the phy is about to be
         * (re)initialized.
         */
index 9effb511acde3e9cf31591e20e5f47f16be0d7a2..d0e64f3b53b992261db51d24d3e53c33392460e0 100644 (file)
@@ -499,6 +499,7 @@ struct macsec_ops;
  *
  * @speed: Current link speed
  * @duplex: Current duplex
+ * @port: Current port
  * @pause: Current pause
  * @asym_pause: Current asymmetric pause
  * @supported: Combined MAC/PHY supported linkmodes
@@ -577,6 +578,7 @@ struct phy_device {
         */
        int speed;
        int duplex;
+       int port;
        int pause;
        int asym_pause;
        u8 master_slave_get;