]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
drm/i915/rkl: new rkl ddc map for different PCH
authorLee Shawn C <shawn.c.lee@intel.com>
Tue, 17 Nov 2020 14:26:29 +0000 (22:26 +0800)
committerLyude Paul <lyude@redhat.com>
Wed, 6 Jan 2021 00:32:34 +0000 (19:32 -0500)
After boot into kernel. Driver configured ddc pin mapping based on
predefined table in parse_ddi_port(). Now driver configure rkl
ddc pin mapping depends on icp_ddc_pin_map[]. Then this table will
give incorrect gmbus port number to cause HDMI can't work.

Refer to commit cd0a89527d06 ("drm/i915/rkl: Add DDC pin mapping").
Create two ddc pin table for rkl TGP and CMP pch. Then HDMI can
works properly on rkl.

v2: update patch based on latest dinq branch.
v3: update ddc table for RKL+TGP sku.
    RKL+CNP sku will load cnp_ddc_pin_map[] setting.
v4: modify the if/else judgment to avoid nesting.
v5: fix typo in v4.

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Aditya Swarup <aditya.swarup@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Khaled Almahallawy <khaled.almahallawy@intel.com>
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2577
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117142629.28729-1-shawn.c.lee@intel.com
drivers/gpu/drm/i915/display/intel_bios.c
drivers/gpu/drm/i915/display/intel_vbt_defs.h

index 06c3310446a261e03bfee134e3c524d005c5b784..987cf509337f232546777f0847f8e73950e44a8c 100644 (file)
@@ -1623,6 +1623,13 @@ static const u8 icp_ddc_pin_map[] = {
        [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
 };
 
+static const u8 rkl_pch_tgp_ddc_pin_map[] = {
+       [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
+       [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
+       [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
+       [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
+};
+
 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
 {
        const u8 *ddc_pin_map;
@@ -1630,6 +1637,9 @@ static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
 
        if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) {
                return vbt_pin;
+       } else if (IS_ROCKETLAKE(dev_priv) && INTEL_PCH_TYPE(dev_priv) == PCH_TGP) {
+               ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
+               n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
        } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
                ddc_pin_map = icp_ddc_pin_map;
                n_entries = ARRAY_SIZE(icp_ddc_pin_map);
index 49b4b5fca94111bb0877573a359433c9afc8887a..187ec573de59d1e37c723c74e6bb547317bb871d 100644 (file)
@@ -319,6 +319,8 @@ enum vbt_gmbus_ddi {
        ICL_DDC_BUS_DDI_A = 0x1,
        ICL_DDC_BUS_DDI_B,
        TGL_DDC_BUS_DDI_C,
+       RKL_DDC_BUS_DDI_D = 0x3,
+       RKL_DDC_BUS_DDI_E,
        ICL_DDC_BUS_PORT_1 = 0x4,
        ICL_DDC_BUS_PORT_2,
        ICL_DDC_BUS_PORT_3,