metag: tz1090: select and instantiate pinctrl-tz1090

Select PINCTRL and PINCTRL_TZ1090 from SOC_TZ1090 to enable the main pin
controller driver once it is merged, and instantiate it from
tz1090.dtsi.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Grant Likely <grant.likely@linaro.org>

diff --git a/arch/metag/Kconfig.soc b/arch/metag/Kconfig.soc
index 653b47917cafb79868a4837da5bc936f522a80ab..6b11ca363ceb5358fb122e4c7ac6d6e75f83baab 100644 (file)
--- a/arch/metag/Kconfig.soc
+++ b/arch/metag/Kconfig.soc
@@ -19,6 +19,8 @@ config SOC_TZ1090
        select METAG_LNKGET_AROUND_CACHE
        select METAG_META21
        select METAG_SMP_WRITE_REORDERING
+       select PINCTRL
+       select PINCTRL_TZ1090
        help
          This is a Toumaz Technology Xenif TZ1090 (A.K.A. Comet) SoC containing
          a 2-threaded HTP.

diff --git a/arch/metag/boot/dts/tz1090.dtsi b/arch/metag/boot/dts/tz1090.dtsi
index ff7bb74abc4b0f952cadef6bb3e83cde917f417f..697f3840e4d8cc64733a417b2c2d4ad8d8361af5 100644 (file)
--- a/arch/metag/boot/dts/tz1090.dtsi
+++ b/arch/metag/boot/dts/tz1090.dtsi
@@ -25,5 +25,11 @@
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
+
+               pinctrl: pinctrl@02005800 {
+                       #gpio-range-cells = <3>;
+                       compatible = "img,tz1090-pinctrl";
+                       reg = <0x02005800 0xe4>;
+               };
        };
 };