clk: sunxi: get divs parent clock name from parent factor clock

Divs clocks consist of a parent factor clock with multiple outputs,
and seperate clocks for each output. Get the name of the parent
clock from the parent factor clock, instead of the DT node name.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Emilio López <emilio@elopez.com.ar>

diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 7a2ed98c353e83e83d0bd3b9d4e6fd1036aa74cb..736fb604bfbc4f3c57af7bb0b68a50b345a476bc 100644 (file)
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -869,7 +869,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node,
                                        struct divs_data *data)
 {
        struct clk_onecell_data *clk_data;
-       const char *parent  = node->name;
+       const char *parent;
        const char *clk_name;
        struct clk **clks, *pclk;
        struct clk_hw *gate_hw, *rate_hw;
@@ -883,6 +883,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node,
 
        /* Set up factor clock that we will be dividing */
        pclk = sunxi_factors_clk_setup(node, data->factors);
+       parent = __clk_get_name(pclk);
 
        reg = of_iomap(node, 0);