]> git.proxmox.com Git - mirror_ubuntu-disco-kernel.git/commitdiff
ice: Calculate guaranteed VSIs per function and use it
authorAnirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Fri, 26 Oct 2018 17:41:03 +0000 (10:41 -0700)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Tue, 13 Nov 2018 17:09:26 +0000 (09:09 -0800)
Currently we are setting the guar_num_vsi to equal to ICE_MAX_VSI
which is the device limit of 768. This is incorrect and could have
unintended consequences. To fix this use the valid_function's 8-bit
bitmap returned from discovering device capabilities to determine the
guar_num_vsi per function. guar_num_vsi value is then passed on to
pf->num_alloc_vsi.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/ice/ice.h
drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
drivers/net/ethernet/intel/ice/ice_common.c
drivers/net/ethernet/intel/ice/ice_main.c
drivers/net/ethernet/intel/ice/ice_type.h

index b8548370f1c722e61817c4857adae71f1cce18f0..ba03cbd3638e04e8a00b300875fdfbff95885e3f 100644 (file)
@@ -52,7 +52,6 @@ extern const char ice_drv_ver[];
 #define ICE_MBXQ_LEN           64
 #define ICE_MIN_MSIX           2
 #define ICE_NO_VSI             0xffff
-#define ICE_MAX_VSI_ALLOC      130
 #define ICE_MAX_TXQS           2048
 #define ICE_MAX_RXQS           2048
 #define ICE_VSI_MAP_CONTIG     0
index 6653555f55dd31d86e8053bf81a3d58570e68caf..602f02a0a2d1a7829bffd369339a5e2b1bf158bb 100644 (file)
@@ -87,6 +87,7 @@ struct ice_aqc_list_caps {
 /* Device/Function buffer entry, repeated per reported capability */
 struct ice_aqc_list_caps_elem {
        __le16 cap;
+#define ICE_AQC_CAPS_VALID_FUNCTIONS                   0x0005
 #define ICE_AQC_CAPS_SRIOV                             0x0012
 #define ICE_AQC_CAPS_VF                                        0x0013
 #define ICE_AQC_CAPS_VSI                               0x0017
index 554fd707a6d69f45f165a6b77ef23bb027ac6baa..9de5a3aac77d7e04e3a9d7a67472d622f9b38639 100644 (file)
@@ -1386,6 +1386,27 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
        }
 }
 
+/**
+ * ice_get_guar_num_vsi - determine number of guar VSI for a PF
+ * @hw: pointer to the hw structure
+ *
+ * Determine the number of valid functions by going through the bitmap returned
+ * from parsing capabilities and use this to calculate the number of VSI per PF.
+ */
+static u32 ice_get_guar_num_vsi(struct ice_hw *hw)
+{
+       u8 funcs;
+
+#define ICE_CAPS_VALID_FUNCS_M 0xFF
+       funcs = hweight8(hw->dev_caps.common_cap.valid_functions &
+                        ICE_CAPS_VALID_FUNCS_M);
+
+       if (!funcs)
+               return 0;
+
+       return ICE_MAX_VSI / funcs;
+}
+
 /**
  * ice_parse_caps - parse function/device capabilities
  * @hw: pointer to the hw struct
@@ -1428,6 +1449,12 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
                u16 cap = le16_to_cpu(cap_resp->cap);
 
                switch (cap) {
+               case ICE_AQC_CAPS_VALID_FUNCTIONS:
+                       caps->valid_functions = number;
+                       ice_debug(hw, ICE_DBG_INIT,
+                                 "HW caps: Valid Functions = %d\n",
+                                 caps->valid_functions);
+                       break;
                case ICE_AQC_CAPS_SRIOV:
                        caps->sr_iov_1_1 = (number == 1);
                        ice_debug(hw, ICE_DBG_INIT,
@@ -1457,10 +1484,10 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
                                          "HW caps: Dev.VSI cnt = %d\n",
                                          dev_p->num_vsi_allocd_to_host);
                        } else if (func_p) {
-                               func_p->guaranteed_num_vsi = number;
+                               func_p->guar_num_vsi = ice_get_guar_num_vsi(hw);
                                ice_debug(hw, ICE_DBG_INIT,
                                          "HW caps: Func.VSI cnt = %d\n",
-                                         func_p->guaranteed_num_vsi);
+                                         number);
                        }
                        break;
                case ICE_AQC_CAPS_RSS:
index 8584061e1bc6686af700a8e141c5af23ee0b041f..ea79e5e1f5898503bac822cd68fdd15cb25adea9 100644 (file)
@@ -2091,8 +2091,7 @@ static int ice_probe(struct pci_dev *pdev,
 
        ice_determine_q_usage(pf);
 
-       pf->num_alloc_vsi = min_t(u16, ICE_MAX_VSI_ALLOC,
-                                 hw->func_caps.guaranteed_num_vsi);
+       pf->num_alloc_vsi = hw->func_caps.guar_num_vsi;
        if (!pf->num_alloc_vsi) {
                err = -EIO;
                goto err_init_pf_unroll;
index f4dbc81c198863b5037f6acc07ed053522923065..0ea42810421571e98f681893e8447d56d8da1cfd 100644 (file)
@@ -124,6 +124,8 @@ struct ice_phy_info {
 
 /* Common HW capabilities for SW use */
 struct ice_hw_common_caps {
+       u32 valid_functions;
+
        /* TX/RX queues */
        u16 num_rxq;            /* Number/Total RX queues */
        u16 rxq_first_id;       /* First queue ID for RX queues */
@@ -150,7 +152,7 @@ struct ice_hw_func_caps {
        struct ice_hw_common_caps common_cap;
        u32 num_allocd_vfs;             /* Number of allocated VFs */
        u32 vf_base_id;                 /* Logical ID of the first VF */
-       u32 guaranteed_num_vsi;
+       u32 guar_num_vsi;
 };
 
 /* Device wide capabilities */