]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
drm/amd/pp: Refine the interface exported to display
authorRex Zhu <Rex.Zhu@amd.com>
Fri, 22 Jun 2018 10:26:52 +0000 (18:26 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 5 Jul 2018 21:39:57 +0000 (16:39 -0500)
use void * as function parameter type in order for extension.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/kgd_pp_interface.h
drivers/gpu/drm/amd/powerplay/amd_powerplay.c
drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

index 4535756428f987ca38eee77e401b7a283424d649..99ee3edd1609a8fd02f58ce329ae32470df9aec5 100644 (file)
@@ -192,7 +192,6 @@ struct amd_pp_simple_clock_info;
 struct amd_pp_display_configuration;
 struct amd_pp_clock_info;
 struct pp_display_clock_request;
-struct pp_wm_sets_with_clock_ranges_soc15;
 struct pp_clock_levels_with_voltage;
 struct pp_clock_levels_with_latency;
 struct amd_pp_clocks;
@@ -261,7 +260,7 @@ struct amd_pm_funcs {
                enum amd_pp_clock_type type,
                struct pp_clock_levels_with_voltage *clocks);
        int (*set_watermarks_for_clocks_ranges)(void *handle,
-               struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges);
+                                               void *clock_ranges);
        int (*display_clock_voltage_request)(void *handle,
                                struct pp_display_clock_request *clock);
        int (*get_display_mode_validation_clocks)(void *handle,
index 387a1eb6678dc2aaf5696daa30f09e34dff9c5c5..b72cc644d4e7c0aacab3b0e5215ad13e73858308 100644 (file)
@@ -1096,17 +1096,17 @@ static int pp_get_clock_by_type_with_voltage(void *handle,
 }
 
 static int pp_set_watermarks_for_clocks_ranges(void *handle,
-               struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
+               void *clock_ranges)
 {
        struct pp_hwmgr *hwmgr = handle;
        int ret = 0;
 
-       if (!hwmgr || !hwmgr->pm_en ||!wm_with_clock_ranges)
+       if (!hwmgr || !hwmgr->pm_en || !clock_ranges)
                return -EINVAL;
 
        mutex_lock(&hwmgr->smu_lock);
        ret = phm_set_watermarks_for_clocks_ranges(hwmgr,
-                       wm_with_clock_ranges);
+                       clock_ranges);
        mutex_unlock(&hwmgr->smu_lock);
 
        return ret;
index a0bb921fac2285d8e289cb31c429ceba152a73cf..53207e76b0f348a9ba82cb7bc347e78a6c7daab3 100644 (file)
@@ -435,7 +435,7 @@ int phm_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
 }
 
 int phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
-               struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
+                                       void *clock_ranges)
 {
        PHM_FUNC_CHECK(hwmgr);
 
@@ -443,7 +443,7 @@ int phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
                return -EINVAL;
 
        return hwmgr->hwmgr_func->set_watermarks_for_clocks_ranges(hwmgr,
-                       wm_with_clock_ranges);
+                                                               clock_ranges);
 }
 
 int phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
index 07cc98c69c7da5db0a587ef6c824f12c60bc563a..02fc0bc41e0a6445d29206bf788d6672b3e3897a 100644 (file)
@@ -1108,9 +1108,10 @@ static int smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
 }
 
 static int smu10_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
-               struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
+               void *clock_ranges)
 {
        struct smu10_hwmgr *data = hwmgr->backend;
+       struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges;
        Watermarks_t *table = &(data->water_marks_table);
        int result = 0;
 
index e5b3abffefb6396ee814cd403205bb4ba3809d1e..d515eb4fac9faca1a324523b29a1cac888620fb5 100644 (file)
@@ -4194,9 +4194,10 @@ static int vega10_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
 }
 
 static int vega10_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
-               struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
+                                                       void *clock_range)
 {
        struct vega10_hwmgr *data = hwmgr->backend;
+       struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_range;
        Watermarks_t *table = &(data->smc_state_table.water_marks_table);
        int result = 0;
 
index 4cf257043a2c7bff847044b0c517097bf9e635fa..448014b173d514090e1c7d6bd600f5178f8fe5d8 100644 (file)
@@ -1781,10 +1781,11 @@ static int vega12_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
 }
 
 static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
-               struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
+                                                       void *clock_ranges)
 {
        struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
        Watermarks_t *table = &(data->smc_state_table.water_marks_table);
+       struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges;
        uint32_t i;
 
        if (!data->registry_data.disable_water_mark &&
index a202247c989444bfaee5e7686ddce367b76dd61d..429c9c4322daaeb818d375eaa2cc79dfdf2f8011 100644 (file)
@@ -455,7 +455,7 @@ extern int phm_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,
                enum amd_pp_clock_type type,
                struct pp_clock_levels_with_voltage *clocks);
 extern int phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
-               struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges);
+                                               void *clock_ranges);
 extern int phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
                struct pp_display_clock_request *clock);
 
index 95e29a22e44510646707363ab9d4992b43099a4c..b3363f26039a75508edeb396d29781f4894db92b 100644 (file)
@@ -293,8 +293,7 @@ struct pp_hwmgr_func {
        int (*get_clock_by_type_with_voltage)(struct pp_hwmgr *hwmgr,
                        enum amd_pp_clock_type type,
                        struct pp_clock_levels_with_voltage *clocks);
-       int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr,
-                       struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges);
+       int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, void *clock_ranges);
        int (*display_clock_voltage_request)(struct pp_hwmgr *hwmgr,
                        struct pp_display_clock_request *clock);
        int (*get_max_high_clocks)(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks);