drm/i915/dp_mst: use intel_de_*() functions for register access

The implicit "dev_priv" local variable use has been a long-standing pain
point in the register access macros I915_READ(), I915_WRITE(),
POSTING_READ(), I915_READ_FW(), and I915_WRITE_FW().

Replace them with the corresponding new display engine register
accessors intel_de_read(), intel_de_write(), intel_de_posting_read(),
intel_de_read_fw(), and intel_de_write_fw().

No functional changes.

Generated using the following semantic patch:

@@
expression REG, OFFSET;
@@
- I915_READ(REG)
+ intel_de_read(dev_priv, REG)

@@
expression REG, OFFSET;
@@
- POSTING_READ(REG)
+ intel_de_posting_read(dev_priv, REG)

@@
expression REG, OFFSET;
@@
- I915_WRITE(REG, OFFSET)
+ intel_de_write(dev_priv, REG, OFFSET)

@@
expression REG;
@@
- I915_READ_FW(REG)
+ intel_de_read_fw(dev_priv, REG)

@@
expression REG, OFFSET;
@@
- I915_WRITE_FW(REG, OFFSET)
+ intel_de_write_fw(dev_priv, REG, OFFSET)

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/06ba99067fc506bec4533202b046d63dda5cb1f2.1579871655.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index ab2315acd5f762deabe929353f53c3238b6b7bdd..4b05886eb45f6e0bf1bd57e3327443d197cefb00 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -360,9 +360,12 @@ static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
 
        drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 
-       val = I915_READ(TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
+       val = intel_de_read(dev_priv,
+                           TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
        val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
-       I915_WRITE(TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder), val);
+       intel_de_write(dev_priv,
+                      TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
+                      val);
 
        if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
                                  DP_TP_STATUS_ACT_SENT, 1))
@@ -458,8 +461,8 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
                DRM_ERROR("failed to allocate vcpi\n");
 
        intel_dp->active_mst_links++;
-       temp = I915_READ(intel_dp->regs.dp_tp_status);
-       I915_WRITE(intel_dp->regs.dp_tp_status, temp);
+       temp = intel_de_read(dev_priv, intel_dp->regs.dp_tp_status);
+       intel_de_write(dev_priv, intel_dp->regs.dp_tp_status, temp);
 
        ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);