]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINE
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 16 Oct 2020 14:25:45 +0000 (10:25 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Oct 2020 05:02:03 +0000 (01:02 -0400)
No need for a separate config option at this point.

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/Kconfig
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
drivers/gpu/drm/amd/display/include/dal_asic_id.h

index 11e1efd8af4fed1f6deaef0fdeff83261ad3c2a8..b8b666969ba64ec5886410ae962037fd75bf9e59 100644 (file)
@@ -17,14 +17,6 @@ config DRM_AMD_DC_DCN
        help
          Raven, Navi and Renoir family support for display engine
 
-config DRM_AMD_DC_GREEN_SARDINE
-       bool "Green Sardine support"
-       default y
-       depends on DRM_AMD_DC_DCN
-        help
-            Choose this option if you want to have
-            Green Sardine support for display engine
-
 config DRM_AMD_DC_DCN3_0
         bool "DCN 3.0 family"
         depends on DRM_AMD_DC && X86
index 97be2036145921e252e6eddae233542969d87cf3..ba49322bd6860bea5955453daa5e40285d09c8b4 100644 (file)
@@ -101,10 +101,8 @@ MODULE_FIRMWARE(FIRMWARE_SIENNA_CICHLID_DMUB);
 #define FIRMWARE_NAVY_FLOUNDER_DMUB "amdgpu/navy_flounder_dmcub.bin"
 MODULE_FIRMWARE(FIRMWARE_NAVY_FLOUNDER_DMUB);
 #endif
-#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
 #define FIRMWARE_GREEN_SARDINE_DMUB "amdgpu/green_sardine_dmcub.bin"
 MODULE_FIRMWARE(FIRMWARE_GREEN_SARDINE_DMUB);
-#endif
 #if defined(CONFIG_DRM_AMD_DC_DCN3_01)
 #define FIRMWARE_VANGOGH_DMUB "amdgpu/vangogh_dmcub.bin"
 MODULE_FIRMWARE(FIRMWARE_VANGOGH_DMUB);
@@ -1001,10 +999,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
        case CHIP_RAVEN:
        case CHIP_RENOIR:
                init_data.flags.gpu_vm_support = true;
-#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
                if (ASICREV_IS_GREEN_SARDINE(adev->external_rev_id))
                        init_data.flags.disable_dmcu = true;
-#endif
                break;
        default:
                break;
@@ -1315,10 +1311,8 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
        case CHIP_RENOIR:
                dmub_asic = DMUB_ASIC_DCN21;
                fw_name_dmub = FIRMWARE_RENOIR_DMUB;
-#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
                if (ASICREV_IS_GREEN_SARDINE(adev->external_rev_id))
                        fw_name_dmub = FIRMWARE_GREEN_SARDINE_DMUB;
-#endif
                break;
 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
        case CHIP_SIENNA_CICHLID:
index b361dc6c348995ea3b951897aa31f93af84820b2..19d97ed6beb8650e065fb01c119f280c23998d3a 100644 (file)
@@ -170,12 +170,10 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
                        break;
                }
 
-#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
                if (ASICREV_IS_GREEN_SARDINE(asic_id.hw_internal_rev)) {
                        rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
                        break;
                }
-#endif
                if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)) {
                        rv2_clk_mgr_construct(ctx, clk_mgr, pp_smu);
                        break;
index d49a8b3e51377933de50b779f300ac3625c71f42..2932116b7ac0e48cf7fa2f97597bf91d14e82cc1 100644 (file)
@@ -126,10 +126,8 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
                        dc_version = DCN_VERSION_1_01;
                if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev))
                        dc_version = DCN_VERSION_2_1;
-#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
                if (ASICREV_IS_GREEN_SARDINE(asic_id.hw_internal_rev))
                        dc_version = DCN_VERSION_2_1;
-#endif
                break;
 #endif
 
index b4c3838322af642c26b0f46dbe6bb05a14627875..2bf60ac2974f100b22f64306bfc85cdf18286bcf 100644 (file)
@@ -209,12 +209,10 @@ enum {
 #if defined(CONFIG_DRM_AMD_DC_DCN3_02)
 #define ASICREV_IS_DIMGREY_CAVEFISH_P(eChipRev)        ((eChipRev >= NV_DIMGREY_CAVEFISH_P_A0) && (eChipRev < NV_UNKNOWN))
 #endif
-#if defined(CONFIG_DRM_AMD_DC_GREEN_SARDINE)
 #define GREEN_SARDINE_A0 0xA1
 #ifndef ASICREV_IS_GREEN_SARDINE
 #define ASICREV_IS_GREEN_SARDINE(eChipRev) ((eChipRev >= GREEN_SARDINE_A0) && (eChipRev < 0xFF))
 #endif
-#endif
 #if defined(CONFIG_DRM_AMD_DC_DCN3_01)
 #define FAMILY_VGH 144
 #define DEVICE_ID_VGH_163F 0x163F