ARM: dts: imx6qdl-gw560x: add lsm9ds1 iio imu/magn support

Add one node for the accel/gyro i2c device and another for the separate
magnetometer device in the lsm9ds1.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-gw560x.dtsi b/arch/arm/boot/dts/imx6qdl-gw560x.dtsi
index e8e36dfd0a6b04f8ee057a420bbfd99861aadd3a..69ca70d3baa8b3d5eabe7eff4140eb6fc7ad413c 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-gw560x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw560x.dtsi
@@ -295,6 +295,15 @@
                VDDIO-supply = <&reg_3p3v>;
        };
 
+       magn@1c {
+               compatible = "st,lsm9ds1-magn";
+               reg = <0x1c>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_mag>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <9 IRQ_TYPE_EDGE_RISING>;
+       };
+
        tca8418: keypad@34 {
                compatible = "ti,tca8418";
                pinctrl-names = "default";
@@ -389,6 +398,16 @@
                        };
                };
        };
+
+       imu@6a {
+               compatible = "st,lsm9ds1-imu";
+               reg = <0x6a>;
+               st,drdy-int-pin = <1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_imu>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
+       };
 };
 
 &i2c3 {
@@ -609,6 +628,12 @@
                >;
        };
 
+       pinctrl_imu: imugrp {
+               fsl,pins = <
+                       MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06      0x1b0b0
+               >;
+       };
+
        pinctrl_keypad: keypadgrp {
                fsl,pins = <
                        MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11      0x0001b0b0 /* KEYPAD_IRQ# */
@@ -616,6 +641,12 @@
                >;
        };
 
+       pinctrl_mag: maggrp {
+               fsl,pins = <
+                       MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09      0x1b0b0
+               >;
+       };
+
        pinctrl_pcie: pciegrp {
                fsl,pins = <
                        MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31      0x1b0b0    /* PCI_RST# */