*/
void mei_clear_interrupts(struct mei_device *dev)
{
- if ((dev->host_hw_state & H_IS) == H_IS)
- mei_reg_write(dev, H_CSR, dev->host_hw_state);
+ u32 hcsr = mei_hcsr_read(dev);
+ if ((hcsr & H_IS) == H_IS)
+ mei_reg_write(dev, H_CSR, hcsr);
}
/**
*/
void mei_enable_interrupts(struct mei_device *dev)
{
- dev->host_hw_state |= H_IE;
- mei_hcsr_set(dev);
+ u32 hcsr = mei_hcsr_read(dev);
+ hcsr |= H_IE;
+ hcsr &= ~H_IS;
+ mei_reg_write(dev, H_CSR, hcsr);
}
/**
*/
void mei_disable_interrupts(struct mei_device *dev)
{
- dev->host_hw_state &= ~H_IE;
- mei_hcsr_set(dev);
+ u32 hcsr = mei_hcsr_read(dev);
+ hcsr &= ~H_IE;
+ hcsr &= ~H_IS;
+ mei_reg_write(dev, H_CSR, hcsr);
}
/**
/* initialize our complete list */
mutex_lock(&dev->device_lock);
mei_io_list_init(&complete_list);
- dev->host_hw_state = mei_hcsr_read(dev);
/* Ack the interrupt here
* In case of MSI we don't go through the quick handler */
return IRQ_HANDLED;
}
+ dev->host_hw_state = mei_hcsr_read(dev);
/* check if we need to start the dev */
if ((dev->host_hw_state & H_RDY) == 0) {
if ((dev->me_hw_state & ME_RDY_HRA) == ME_RDY_HRA) {
return 0;
release_irq:
- /* disable interrupts */
- dev->host_hw_state = mei_hcsr_read(dev);
mei_disable_interrupts(dev);
flush_scheduled_work();
free_irq(pdev->irq, dev);