net: hns3: use lower_32_bits and upper_32_bits

BugLink: https://bugs.launchpad.net/bugs/1787477
MACRO lower_32_bits and upper_32_bits can help to get bits 0-31
and bits 32-63 of a number, so just use it.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit ab68059e15d7a05d162716fc0b3ca04b7df46c65)
Signed-off-by: dann frazier <dann.frazier@canonical.com>
Acked-by: Stefan Bader <stefan.bader@canonical.com>
Acked-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
index 7049d0bc72acaa4bea8d32a7ac18185a35abbad5..383ecf036e3146671c79616146fc66af568c4489 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
@@ -123,9 +123,9 @@ static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring)
 
        if (ring->flag == HCLGE_TYPE_CSQ) {
                hclge_write_dev(hw, HCLGE_NIC_CSQ_BASEADDR_L_REG,
-                               (u32)dma);
+                               lower_32_bits(dma));
                hclge_write_dev(hw, HCLGE_NIC_CSQ_BASEADDR_H_REG,
-                               (u32)((dma >> 31) >> 1));
+                               upper_32_bits(dma));
                hclge_write_dev(hw, HCLGE_NIC_CSQ_DEPTH_REG,
                                (ring->desc_num >> HCLGE_NIC_CMQ_DESC_NUM_S) |
                                HCLGE_NIC_CMQ_ENABLE);
@@ -133,9 +133,9 @@ static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring)
                hclge_write_dev(hw, HCLGE_NIC_CSQ_HEAD_REG, 0);
        } else {
                hclge_write_dev(hw, HCLGE_NIC_CRQ_BASEADDR_L_REG,
-                               (u32)dma);
+                               lower_32_bits(dma));
                hclge_write_dev(hw, HCLGE_NIC_CRQ_BASEADDR_H_REG,
-                               (u32)((dma >> 31) >> 1));
+                               upper_32_bits(dma));
                hclge_write_dev(hw, HCLGE_NIC_CRQ_DEPTH_REG,
                                (ring->desc_num >> HCLGE_NIC_CMQ_DESC_NUM_S) |
                                HCLGE_NIC_CMQ_ENABLE);