drm/amdgpu: refine ci uvd dpm code.

Fix up the powergating logic.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Ack-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index ece94eeb638e2fa8d00a859a1dac33526b65aa7a..9498e78b90d7a4714b36736d3658f17bc4746ecd 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -889,7 +889,16 @@ static void ci_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate)
 
        pi->uvd_power_gated = gate;
 
-       ci_update_uvd_dpm(adev, gate);
+       if (gate) {
+               /* stop the UVD block */
+               amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
+                                                       AMD_PG_STATE_GATE);
+               ci_update_uvd_dpm(adev, gate);
+       } else {
+               amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,
+                                                       AMD_PG_STATE_UNGATE);
+               ci_update_uvd_dpm(adev, gate);
+       }
 }
 
 static bool ci_dpm_vblank_too_short(struct amdgpu_device *adev)