]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
drm/amdgpu/powerplay: add a new interface to set the mp1 state
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 25 Jul 2019 14:41:53 +0000 (09:41 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 31 Jul 2019 04:24:21 +0000 (23:24 -0500)
This is required for certain cases such as various GPU resets
(mode1, mode2), BACO, shutdown, unload, etc. to put the SMU into
the appropriate state for when the hw is re-initialized.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/kgd_pp_interface.h
drivers/gpu/drm/amd/powerplay/amd_powerplay.c
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

index 9733bbf9bc72bcdaa777362b27db7b6f7d91f22e..95edc3d3a9c49de584e2d6ce226296e262200475 100644 (file)
@@ -171,6 +171,13 @@ enum PP_HWMON_TEMP {
        PP_TEMP_MAX
 };
 
+enum pp_mp1_state {
+       PP_MP1_STATE_NONE,
+       PP_MP1_STATE_SHUTDOWN,
+       PP_MP1_STATE_UNLOAD,
+       PP_MP1_STATE_RESET,
+};
+
 #define PP_GROUP_MASK        0xF0000000
 #define PP_GROUP_SHIFT       28
 
@@ -266,6 +273,7 @@ struct amd_pm_funcs {
        int (*get_power_profile_mode)(void *handle, char *buf);
        int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
        int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, uint32_t size);
+       int (*set_mp1_state)(void *handle, enum pp_mp1_state mp1_state);
 /* export to DC */
        u32 (*get_sclk)(void *handle, bool low);
        u32 (*get_mclk)(void *handle, bool low);
index bea1587d352dfd7f14c520e7975a5fec96bf54c3..88a2ef75b7e1208866546852901b2a9affa4ea01 100644 (file)
@@ -924,6 +924,21 @@ static int pp_odn_edit_dpm_table(void *handle, uint32_t type, long *input, uint3
        return hwmgr->hwmgr_func->odn_edit_dpm_table(hwmgr, type, input, size);
 }
 
+static int pp_dpm_set_mp1_state(void *handle, enum pp_mp1_state mp1_state)
+{
+       struct pp_hwmgr *hwmgr = handle;
+
+       if (!hwmgr || !hwmgr->pm_en)
+               return -EINVAL;
+
+       if (hwmgr->hwmgr_func->set_mp1_state == NULL) {
+               pr_info_ratelimited("%s was not implemented.\n", __func__);
+               return -EINVAL;
+       }
+
+       return hwmgr->hwmgr_func->set_mp1_state(hwmgr, mp1_state);
+}
+
 static int pp_dpm_switch_power_profile(void *handle,
                enum PP_SMC_POWER_PROFILE type, bool en)
 {
@@ -1525,6 +1540,7 @@ static const struct amd_pm_funcs pp_dpm_funcs = {
        .get_power_profile_mode = pp_get_power_profile_mode,
        .set_power_profile_mode = pp_set_power_profile_mode,
        .odn_edit_dpm_table = pp_odn_edit_dpm_table,
+       .set_mp1_state = pp_dpm_set_mp1_state,
        .set_power_limit = pp_set_power_limit,
        .get_power_limit = pp_get_power_limit,
 /* export to DC */
index c5989cb38b1bb688d0f6efb8b87606e4d6346c02..07fd64aad2aed6872d5374cf670608399a397037 100644 (file)
@@ -344,6 +344,7 @@ struct pp_hwmgr_func {
        int (*set_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE state);
        int (*get_ppfeature_status)(struct pp_hwmgr *hwmgr, char *buf);
        int (*set_ppfeature_status)(struct pp_hwmgr *hwmgr, uint64_t ppfeature_masks);
+       int (*set_mp1_state)(struct pp_hwmgr *hwmgr, enum pp_mp1_state mp1_state);
 };
 
 struct pp_table_func {