ARM: dts: alt: use correct logic for SD WP pins

The WP pins are ACTIVE_HIGH, fix it in the DTS.

Fixes: 2b41091b896b ("ARM: dts: alt: add SDHI0 and 1 support")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index e45f92b5eb1107900f9d5f152d9ad4702bc60928..bd98790d964e13a7afbf50c67ef9ce6a8e3490f6 100644 (file)
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -304,7 +304,7 @@
        vmmc-supply = <&vcc_sdhi0>;
        vqmmc-supply = <&vccq_sdhi0>;
        cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
-       wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
        sd-uhs-sdr50;
        sd-uhs-sdr104;
        status = "okay";
@@ -318,7 +318,7 @@
        vmmc-supply = <&vcc_sdhi1>;
        vqmmc-supply = <&vccq_sdhi1>;
        cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
-       wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
        sd-uhs-sdr50;
        status = "okay";
 };