x86/mm: Set IBPB upon context switch

CVE-2017-5753
CVE-2017-5715

Set IBPB on context switch with changing of page table.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Andy Whitcroft <apw@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>

diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 06f3854d0a4f020d1af4c67cb3d29fcfdc0ff406..bb3ded3a4e5f4553a1d47c930a98de8562bc0270 100644 (file)
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -12,6 +12,7 @@
 #include <asm/cache.h>
 #include <asm/apic.h>
 #include <asm/uv/uv.h>
+#include <asm/microcode.h>
 #include <linux/debugfs.h>
 
 /*
@@ -218,6 +219,9 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
                u16 new_asid;
                bool need_flush;
 
+               if (boot_cpu_has(X86_FEATURE_SPEC_CTRL))
+                       native_wrmsrl(MSR_IA32_PRED_CMD, FEATURE_SET_IBPB);
+
                if (IS_ENABLED(CONFIG_VMAP_STACK)) {
                        /*
                         * If our current stack is in vmalloc space and isn't