drm/amdgpu: poll ras_controller_irq and err_event_athub_irq status

For the hardware that can not enable BIF ring for IH cookies for both
ras_controller_irq and err_event_athub_irq, the driver has to poll the
status register in irq handling and ack the hardware properly when there
is interrupt triggered

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 2a3f5ec298dbc7c74f632ba921c12ba8dd25299f..4ed6a4d0d7dbb846f51d6d41380026d98a0d11df 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -153,6 +153,18 @@ irqreturn_t amdgpu_irq_handler(int irq, void *arg)
        ret = amdgpu_ih_process(adev, &adev->irq.ih);
        if (ret == IRQ_HANDLED)
                pm_runtime_mark_last_busy(dev->dev);
+
+       /* For the hardware that cannot enable bif ring for both ras_controller_irq
+         * and ras_err_evnet_athub_irq ih cookies, the driver has to poll status
+        * register to check whether the interrupt is triggered or not, and properly
+        * ack the interrupt if it is there
+        */
+       if (adev->nbio.funcs->handle_ras_controller_intr_no_bifring)
+               adev->nbio.funcs->handle_ras_controller_intr_no_bifring(adev);
+
+       if (adev->nbio.funcs->handle_ras_err_event_athub_intr_no_bifring)
+               adev->nbio.funcs->handle_ras_err_event_athub_intr_no_bifring(adev);
+
        return ret;
 }