drm/tegra: sor - Do not hardcode link speed

Use the speed probed from the link at runtime rather than relying on a
hardcoded default.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index ff025aa786e88d7a02bc7caceb5b2cad8457acaa..4e354ee4b20379c9d093fcbbdf1b1397e7586de0 100644 (file)
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -658,10 +658,10 @@ static int tegra_output_sor_enable(struct tegra_output *output)
                usleep_range(250, 1000);
        }
 
-       /* set link bandwidth (2.7 GHz, XXX: parameterize based on link?) */
+       /* set link bandwidth */
        value = tegra_sor_readl(sor, SOR_CLK_CNTRL);
        value &= ~SOR_CLK_CNTRL_DP_LINK_SPEED_MASK;
-       value |= SOR_CLK_CNTRL_DP_LINK_SPEED_G2_70;
+       value |= drm_dp_link_rate_to_bw_code(link.rate) << 2;
        tegra_sor_writel(sor, value, SOR_CLK_CNTRL);
 
        /* set linkctl */