]> git.proxmox.com Git - mirror_qemu.git/commitdiff
target-alpha: Move fpcr helpers from op_helper.c to helper.c.
authorRichard Henderson <rth@twiddle.net>
Sat, 24 Mar 2012 16:51:10 +0000 (09:51 -0700)
committerBlue Swirl <blauwirbel@gmail.com>
Sat, 24 Mar 2012 17:07:28 +0000 (17:07 +0000)
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-alpha/helper.c
target-alpha/helper.h
target-alpha/op_helper.c
target-alpha/translate.c

index 584457f062efde0caf9c7a210ed3fa422509a371..3333bfa1b932a8df313a2c02705242277c6cdaf6 100644 (file)
@@ -159,9 +159,19 @@ void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val)
     env->fpcr_undz = (val & FPCR_UNDZ) != 0;
 }
 
+uint64_t helper_load_fpcr(CPUAlphaState *env)
+{
+    return cpu_alpha_load_fpcr(env);
+}
+
+void helper_store_fpcr(CPUAlphaState *env, uint64_t val)
+{
+    cpu_alpha_store_fpcr(env, val);
+}
+
 #if defined(CONFIG_USER_ONLY)
-int cpu_alpha_handle_mmu_fault (CPUAlphaState *env, target_ulong address, int rw,
-                                int mmu_idx)
+int cpu_alpha_handle_mmu_fault(CPUAlphaState *env, target_ulong address,
+                               int rw, int mmu_idx)
 {
     env->exception_index = EXCP_MMFAULT;
     env->trap_arg0 = address;
index d36df5fb9eadfe24f24d8288f16c477def344e34..e193c2676eaa6edfbd51284e0ccdaf3180add35f 100644 (file)
@@ -34,8 +34,8 @@ DEF_HELPER_FLAGS_1(pkwb, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64)
 DEF_HELPER_FLAGS_1(unpkbl, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64)
 DEF_HELPER_FLAGS_1(unpkbw, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64)
 
-DEF_HELPER_FLAGS_0(load_fpcr, TCG_CALL_CONST | TCG_CALL_PURE, i64)
-DEF_HELPER_FLAGS_1(store_fpcr, TCG_CALL_CONST, void, i64)
+DEF_HELPER_FLAGS_1(load_fpcr, TCG_CALL_CONST | TCG_CALL_PURE, i64, env)
+DEF_HELPER_FLAGS_2(store_fpcr, TCG_CALL_CONST, void, env, i64)
 
 DEF_HELPER_FLAGS_1(f_to_memory, TCG_CALL_CONST | TCG_CALL_PURE, i32, i64)
 DEF_HELPER_FLAGS_1(memory_to_f, TCG_CALL_CONST | TCG_CALL_PURE, i64, i32)
index 6711d998b96b0c4e10b6e50b8d3cd6c86c90c5c0..59ee31e2f8e4597bfab06fe0454150bfba8fbc1f 100644 (file)
@@ -43,16 +43,6 @@ uint64_t helper_load_pcc (void)
 #endif
 }
 
-uint64_t helper_load_fpcr (void)
-{
-    return cpu_alpha_load_fpcr (env);
-}
-
-void helper_store_fpcr (uint64_t val)
-{
-    cpu_alpha_store_fpcr (env, val);
-}
-
 uint64_t helper_addqv (uint64_t op1, uint64_t op2)
 {
     uint64_t tmp = op1;
index a9b97a31883b4c68728fa8d38fe6fca4bc5f4223..6f31b6dbe043948527caefbf1ac0724a90f25da9 100644 (file)
@@ -2678,17 +2678,17 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn)
         case 0x024:
             /* MT_FPCR */
             if (likely(ra != 31))
-                gen_helper_store_fpcr(cpu_fir[ra]);
+                gen_helper_store_fpcr(cpu_env, cpu_fir[ra]);
             else {
                 TCGv tmp = tcg_const_i64(0);
-                gen_helper_store_fpcr(tmp);
+                gen_helper_store_fpcr(cpu_env, tmp);
                 tcg_temp_free(tmp);
             }
             break;
         case 0x025:
             /* MF_FPCR */
             if (likely(ra != 31))
-                gen_helper_load_fpcr(cpu_fir[ra]);
+                gen_helper_load_fpcr(cpu_fir[ra], cpu_env);
             break;
         case 0x02A:
             /* FCMOVEQ */