dt-bindings: iio: adc: meson-saradc: update temperature sensor support

Meson8b and Meson8m2 use a 5-bit wide TSC (temperature sensor
coefficient). The SAR ADC registers however can only store (the lower)
4 bits. The fifth (upper-most) bit is stored inside the
MESON_HHI_DPLL_TOP_0[9] register from the HHI register area.
This adds a syscon property to the HHI register area so a driver can
fetch the HHI register map and store the fifth TSC bit in there.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
index 325090e43ce6b226972ea1b0efbd1df5157133cf..75c77595410240ae9d0d3be9e3f80d0de0143f32 100644 (file)
--- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
@@ -23,6 +23,10 @@ Required properties:
 - #io-channel-cells: must be 1, see ../iio-bindings.txt
 
 Optional properties:
+- amlogic,hhi-sysctrl: phandle to the syscon which contains the 5th bit
+                       of the TSC (temperature sensor coefficient) on
+                       Meson8b and Meson8m2 (which used to calibrate the
+                       temperature sensor)
 - nvmem-cells:         phandle to the temperature_calib eFuse cells
 - nvmem-cell-names:    if present (to enable the temperature sensor
                        calibration) this must contain "temperature_calib"