drm/amdgpu/gfx8: set doorbell range for polaris as well

Add missing chips to the doorbell range setup.  These
were missed in the KIQ code.  Fixes power and performance
regressions with KIQ.  Spotted by Rex.

Tested-and-Reviewed-by:  Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 089bd49e6ace738b32eff246a34628c45d0396e3..6ea8631cf4095e5f97ab5f15a8e33aa936b0d5f0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4893,8 +4893,11 @@ static int gfx_v8_0_kiq_init_register(struct amdgpu_ring *ring)
        /* enable the doorbell if requested */
        if (ring->use_doorbell) {
                if ((adev->asic_type == CHIP_CARRIZO) ||
-                               (adev->asic_type == CHIP_FIJI) ||
-                               (adev->asic_type == CHIP_STONEY)) {
+                   (adev->asic_type == CHIP_FIJI) ||
+                   (adev->asic_type == CHIP_STONEY) ||
+                   (adev->asic_type == CHIP_POLARIS10) ||
+                   (adev->asic_type == CHIP_POLARIS11) ||
+                   (adev->asic_type == CHIP_POLARIS12)) {
                        WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER,
                                                AMDGPU_DOORBELL_KIQ << 2);
                        WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER,