/* Macros to access registers */
-/* PLX9080 interrupt mask and status */
-#define RtdPlxInterruptWrite(dev, v) \
- writel(v, devpriv->lcfg+LCFG_ITCSR)
-
/* Set mode for DMA 0 */
#define RtdDma0Mode(dev, m) \
writel((m), devpriv->lcfg+LCFG_DMAMODE0)
writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
#ifdef USE_DMA
if (devpriv->flags & DMA0_ACTIVE) {
- RtdPlxInterruptWrite(dev,
- readl(devpriv->lcfg + LCFG_ITCSR) & ~ICS_DMA0_E);
+ writel(readl(devpriv->lcfg + LCFG_ITCSR) & ~ICS_DMA0_E,
+ devpriv->lcfg + LCFG_ITCSR);
abort_dma(dev, 0);
devpriv->flags &= ~DMA0_ACTIVE;
/* if Using DMA, then we should have read everything by now */
writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
#ifdef USE_DMA
if (devpriv->flags & DMA0_ACTIVE) { /* cancel anything running */
- RtdPlxInterruptWrite(dev,
- readl(devpriv->lcfg + LCFG_ITCSR) & ~ICS_DMA0_E);
+ writel(readl(devpriv->lcfg + LCFG_ITCSR) & ~ICS_DMA0_E,
+ devpriv->lcfg + LCFG_ITCSR);
abort_dma(dev, 0);
devpriv->flags &= ~DMA0_ACTIVE;
if (readl(devpriv->lcfg + LCFG_ITCSR) & ICS_DMA0_A)
RtdDma0Next(dev, /* point to first block */
devpriv->dma0Chain[DMA_CHAIN_COUNT - 1].next);
writel(DMAS_ADFIFO_HALF_FULL, devpriv->las0 + LAS0_DMA0_SRC);
- RtdPlxInterruptWrite(dev,
- readl(devpriv->lcfg + LCFG_ITCSR) | ICS_DMA0_E);
+ writel(readl(devpriv->lcfg + LCFG_ITCSR) | ICS_DMA0_E,
+ devpriv->lcfg + LCFG_ITCSR);
/* Must be 2 steps. See PLX app note about "Starting a DMA transfer" */
RtdDma0Control(dev, PLX_DMA_EN_BIT); /* enable DMA (clear INTR?) */
RtdDma0Control(dev, PLX_DMA_EN_BIT | PLX_DMA_START_BIT); /*start DMA */
devpriv->aiCount = 0; /* stop and don't transfer any more */
#ifdef USE_DMA
if (devpriv->flags & DMA0_ACTIVE) {
- RtdPlxInterruptWrite(dev,
- readl(devpriv->lcfg + LCFG_ITCSR) & ~ICS_DMA0_E);
+ writel(readl(devpriv->lcfg + LCFG_ITCSR) & ~ICS_DMA0_E,
+ devpriv->lcfg + LCFG_ITCSR);
abort_dma(dev, 0);
devpriv->flags &= ~DMA0_ACTIVE;
}
/* also, initialize shadow registers */
writel(0, devpriv->las0 + LAS0_BOARD_RESET);
udelay(100); /* needed? */
- RtdPlxInterruptWrite(dev, 0);
+ writel(0, devpriv->lcfg + LCFG_ITCSR);
devpriv->intMask = 0;
writew(devpriv->intMask, devpriv->las0 + LAS0_IT);
devpriv->intClearMask = ~0;
}
#endif /* USE_DMA */
- if (dev->irq) { /* enable plx9080 interrupts */
- RtdPlxInterruptWrite(dev, ICS_PIE | ICS_PLIE);
- }
+ if (dev->irq)
+ writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + LCFG_ITCSR);
printk("\ncomedi%d: rtd520 driver attached.\n", dev->minor);
#endif /* USE_DMA */
/* subdevices and priv are freed by the core */
if (dev->irq) {
- RtdPlxInterruptWrite(dev,
- readl(devpriv->lcfg + LCFG_ITCSR) &
- ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E));
+ writel(readl(devpriv->lcfg + LCFG_ITCSR) &
+ ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E),
+ devpriv->lcfg + LCFG_ITCSR);
free_irq(dev->irq, dev);
}
if (devpriv->lcfg) {
RtdDma0Control(dev, 0); /* disable DMA */
RtdDma1Control(dev, 0); /* disable DMA */
- RtdPlxInterruptWrite(dev, ICS_PIE | ICS_PLIE);
+ writel(ICS_PIE | ICS_PLIE, devpriv->lcfg + LCFG_ITCSR);
}
#endif /* USE_DMA */
if (devpriv->las0) {
}
#endif /* USE_DMA */
if (dev->irq) {
- RtdPlxInterruptWrite(dev,
- readl(devpriv->lcfg + LCFG_ITCSR) &
- ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E));
+ writel(readl(devpriv->lcfg + LCFG_ITCSR) &
+ ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E),
+ devpriv->lcfg + LCFG_ITCSR);
free_irq(dev->irq, dev);
}
if (devpriv->las0)