resource_build_bit_depth_reduction_params(stream,
¶ms);
stream->bit_depth_params = params;
- pipes->opp->funcs->
- opp_program_bit_depth_reduction(pipes->opp, ¶ms);
+ pipes->stream_res.opp->funcs->
+ opp_program_bit_depth_reduction(pipes->stream_res.opp, ¶ms);
}
static void allocate_dc_stream_funcs(struct core_dc *core_dc)
{
/* disable bit depth reduction */
pipe_ctx->stream->bit_depth_params = params;
- pipe_ctx->opp->funcs->
- opp_program_bit_depth_reduction(pipe_ctx->opp, ¶ms);
+ pipe_ctx->stream_res.opp->funcs->
+ opp_program_bit_depth_reduction(pipe_ctx->stream_res.opp, ¶ms);
pipe_ctx->tg->funcs->set_test_pattern(pipe_ctx->tg,
controller_test_pattern, color_depth);
resource_build_bit_depth_reduction_params(pipe_ctx->stream,
¶ms);
pipe_ctx->stream->bit_depth_params = params;
- pipe_ctx->opp->funcs->
- opp_program_bit_depth_reduction(pipe_ctx->opp, ¶ms);
+ pipe_ctx->stream_res.opp->funcs->
+ opp_program_bit_depth_reduction(pipe_ctx->stream_res.opp, ¶ms);
pipe_ctx->tg->funcs->set_test_pattern(pipe_ctx->tg,
CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
pipe_ctx->plane_res.mi = pool->mis[i];
pipe_ctx->plane_res.ipp = pool->ipps[i];
pipe_ctx->plane_res.xfm = pool->transforms[i];
- pipe_ctx->opp = pool->opps[i];
+ pipe_ctx->stream_res.opp = pool->opps[i];
pipe_ctx->dis_clk = pool->display_clock;
pipe_ctx->pipe_idx = i;
if (tail_pipe) {
free_pipe->tg = tail_pipe->tg;
- free_pipe->opp = tail_pipe->opp;
+ free_pipe->stream_res.opp = tail_pipe->stream_res.opp;
free_pipe->stream_enc = tail_pipe->stream_enc;
free_pipe->audio = tail_pipe->audio;
free_pipe->clock_source = tail_pipe->clock_source;
pipe_ctx->plane_res.mi = pool->mis[i];
pipe_ctx->plane_res.ipp = pool->ipps[i];
pipe_ctx->plane_res.xfm = pool->transforms[i];
- pipe_ctx->opp = pool->opps[i];
+ pipe_ctx->stream_res.opp = pool->opps[i];
pipe_ctx->dis_clk = pool->display_clock;
pipe_ctx->pipe_idx = i;
/* */
dc->hwss.prog_pixclk_crtc_otg(pipe_ctx, context, dc);
- pipe_ctx->opp->funcs->opp_set_dyn_expansion(
- pipe_ctx->opp,
+ pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(
+ pipe_ctx->stream_res.opp,
COLOR_SPACE_YCBCR601,
stream->timing.display_color_depth,
pipe_ctx->stream->signal);
/* FPGA does not program backend */
if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
- pipe_ctx->opp->funcs->opp_program_fmt(
- pipe_ctx->opp,
+ pipe_ctx->stream_res.opp->funcs->opp_program_fmt(
+ pipe_ctx->stream_res.opp,
&stream->bit_depth_params,
&stream->clamping);
return DC_OK;
/*vbios crtc_source_selection and encoder_setup will override fmt_C*/
- pipe_ctx->opp->funcs->opp_program_fmt(
- pipe_ctx->opp,
+ pipe_ctx->stream_res.opp->funcs->opp_program_fmt(
+ pipe_ctx->stream_res.opp,
&stream->bit_depth_params,
&stream->clamping);
pipe_ctx->plane_res.mi = pool->mis[underlay_idx];
/*pipe_ctx->plane_res.ipp = res_ctx->pool->ipps[underlay_idx];*/
pipe_ctx->plane_res.xfm = pool->transforms[underlay_idx];
- pipe_ctx->opp = pool->opps[underlay_idx];
+ pipe_ctx->stream_res.opp = pool->opps[underlay_idx];
pipe_ctx->dis_clk = pool->display_clock;
pipe_ctx->pipe_idx = underlay_idx;
&stream->timing,
true);
- pipe_ctx->opp->funcs->opp_set_stereo_polarity(
- pipe_ctx->opp,
+ pipe_ctx->stream_res.opp->funcs->opp_set_stereo_polarity(
+ pipe_ctx->stream_res.opp,
enableStereo,
rightEyePolarity);
inst_offset = reg_offsets[pipe_ctx->tg->inst].fmt;
- pipe_ctx->opp->funcs->opp_program_fmt(
- pipe_ctx->opp,
+ pipe_ctx->stream_res.opp->funcs->opp_program_fmt(
+ pipe_ctx->stream_res.opp,
&stream->bit_depth_params,
&stream->clamping);
#endif
IPP_OUTPUT_FORMAT_12_BIT_FIX);
mpcc_cfg.mi = mi;
- mpcc_cfg.opp = pipe_ctx->opp;
+ mpcc_cfg.opp = pipe_ctx->stream_res.opp;
for (top_pipe = pipe_ctx->top_pipe; top_pipe; top_pipe = top_pipe->top_pipe)
mpcc_cfg.z_index++;
if (dc->public.debug.surface_visual_confirm)
/* reset mpc */
dc->res_pool->mpc->funcs->remove(
dc->res_pool->mpc,
- old_pipe_ctx->opp,
+ old_pipe_ctx->stream_res.opp,
old_pipe_ctx->pipe_idx);
- old_pipe_ctx->opp->mpcc_disconnect_pending[old_pipe_ctx->plane_res.mi->mpcc_id] = true;
+ old_pipe_ctx->stream_res.opp->mpcc_disconnect_pending[old_pipe_ctx->plane_res.mi->mpcc_id] = true;
/*dm_logger_write(dc->ctx->logger, LOG_ERROR,
"[debug_mpo: apply_ctx disconnect pending on mpcc %d]\n",
dcn10_config_stereo_parameters(stream, &flags);
- pipe_ctx->opp->funcs->opp_set_stereo_polarity(
- pipe_ctx->opp,
+ pipe_ctx->stream_res.opp->funcs->opp_set_stereo_polarity(
+ pipe_ctx->stream_res.opp,
flags.PROGRAM_STEREO == 1 ? true:false,
stream->timing.flags.RIGHT_EYE_3D_POLARITY == 1 ? true:false);
{
int i;
- if (!pipe_ctx->opp)
+ if (!pipe_ctx->stream_res.opp)
return;
for (i = 0; i < MAX_PIPES; i++) {
- if (pipe_ctx->opp->mpcc_disconnect_pending[i]) {
+ if (pipe_ctx->stream_res.opp->mpcc_disconnect_pending[i]) {
res_pool->mpc->funcs->wait_for_idle(res_pool->mpc, i);
- pipe_ctx->opp->mpcc_disconnect_pending[i] = false;
+ pipe_ctx->stream_res.opp->mpcc_disconnect_pending[i] = false;
res_pool->mis[i]->funcs->set_blank(res_pool->mis[i], true);
/*dm_logger_write(dc->ctx->logger, LOG_ERROR,
"[debug_mpo: wait_for_mpcc finished waiting on mpcc %d]\n",
idle_pipe->stream = head_pipe->stream;
idle_pipe->tg = head_pipe->tg;
- idle_pipe->opp = head_pipe->opp;
+ idle_pipe->stream_res.opp = head_pipe->stream_res.opp;
idle_pipe->plane_res.mi = pool->mis[idle_pipe->pipe_idx];
idle_pipe->plane_res.ipp = pool->ipps[idle_pipe->pipe_idx];
};
struct stream_resource {
- int stub;
+ struct output_pixel_processor *opp;
};
struct plane_resource {
struct plane_resource plane_res;
struct stream_resource stream_res;
- struct output_pixel_processor *opp;
struct timing_generator *tg;
struct stream_encoder *stream_enc;