{
struct dce_mem_input *dce_mi = TO_DCE_MEM_INPUT(mem_input);
- /* TODO: Figure out if two modes are needed:
- * non-XDMA Mode: GRPH_SURFACE_UPDATE_IMMEDIATE_EN = 1
- * XDMA Mode: GRPH_SURFACE_UPDATE_H_RETRACE_EN = 1
- */
REG_UPDATE(GRPH_UPDATE, GRPH_UPDATE_LOCK, 1);
- REG_UPDATE_2(
+ REG_UPDATE(
GRPH_FLIP_CONTROL,
- GRPH_SURFACE_UPDATE_IMMEDIATE_EN, 0,
GRPH_SURFACE_UPDATE_H_RETRACE_EN, flip_immediate ? 1 : 0);
switch (address->type) {
SFB(blk, GRPH_FLIP_CONTROL, GRPH_SURFACE_UPDATE_H_RETRACE_EN, mask_sh)
#define MI_DCP_DCE11_MASK_SH_LIST(mask_sh, blk)\
- SFB(blk, GRPH_FLIP_CONTROL, GRPH_SURFACE_UPDATE_IMMEDIATE_EN, mask_sh),\
SFB(blk, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, GRPH_PIPE_OUTSTANDING_REQUEST_LIMIT, mask_sh)
#define MI_DCP_PTE_MASK_SH_LIST(mask_sh, blk)\
type GRPH_PRIMARY_SURFACE_ADDRESS_HIGH; \
type GRPH_PRIMARY_SURFACE_ADDRESS; \
type GRPH_SURFACE_UPDATE_PENDING; \
- type GRPH_SURFACE_UPDATE_IMMEDIATE_EN; \
type GRPH_SURFACE_UPDATE_H_RETRACE_EN; \
type GRPH_UPDATE_LOCK; \
type PIXEL_DURATION; \