x86/asm/64: Use 32-bit XOR to zero registers

Some Intel CPUs don't recognize 64-bit XORs as zeroing idioms. Zeroing
idioms don't require execution bandwidth, as they're being taken care
of in the frontend (through register renaming). Use 32-bit XORs instead.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Cc: Alok Kataria <akataria@vmware.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: davem@davemloft.net
Cc: herbert@gondor.apana.org.au
Cc: pavel@ucw.cz
Cc: rjw@rjwysocki.net
Link: http://lkml.kernel.org/r/5B39FF1A02000078001CFB54@prv1-mh.provo.novell.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

diff --git a/arch/x86/crypto/aegis128-aesni-asm.S b/arch/x86/crypto/aegis128-aesni-asm.S
index 9254e0b6cc060011d63b2bfa9ec281768776b2bc..d5c5e2082ae7ee933145cdb6db415bdda4371080 100644 (file)
--- a/arch/x86/crypto/aegis128-aesni-asm.S
+++ b/arch/x86/crypto/aegis128-aesni-asm.S
@@ -75,7 +75,7 @@
  *   %r9
  */
 __load_partial:
-       xor %r9, %r9
+       xor %r9d, %r9d
        pxor MSG, MSG
 
        mov LEN, %r8

diff --git a/arch/x86/crypto/aegis128l-aesni-asm.S b/arch/x86/crypto/aegis128l-aesni-asm.S
index 9263c344f2c797d847b7b7ec534803010a5c9e72..0fbdf5f00bda5ca64897132c5ef5bca00ff7f11b 100644 (file)
--- a/arch/x86/crypto/aegis128l-aesni-asm.S
+++ b/arch/x86/crypto/aegis128l-aesni-asm.S
@@ -66,7 +66,7 @@
  *   %r9
  */
 __load_partial:
-       xor %r9, %r9
+       xor %r9d, %r9d
        pxor MSG0, MSG0
        pxor MSG1, MSG1
 

diff --git a/arch/x86/crypto/aegis256-aesni-asm.S b/arch/x86/crypto/aegis256-aesni-asm.S
index 1d977d515bf992c649d8890316dfca41fc511364..a49f58e2a5ddc491e29131d288d6f4157f9d1fb4 100644 (file)
--- a/arch/x86/crypto/aegis256-aesni-asm.S
+++ b/arch/x86/crypto/aegis256-aesni-asm.S
@@ -59,7 +59,7 @@
  *   %r9
  */
 __load_partial:
-       xor %r9, %r9
+       xor %r9d, %r9d
        pxor MSG, MSG
 
        mov LEN, %r8

diff --git a/arch/x86/crypto/aesni-intel_asm.S b/arch/x86/crypto/aesni-intel_asm.S
index e762ef417562ff96ba769a555a36f546ff5d7d92..9bd139569b410d9e41cff15fb36aeb366930be95 100644 (file)
--- a/arch/x86/crypto/aesni-intel_asm.S
+++ b/arch/x86/crypto/aesni-intel_asm.S
@@ -258,7 +258,7 @@ ALL_F:      .octa 0xffffffffffffffffffffffffffffffff
 .macro GCM_INIT Iv SUBKEY AAD AADLEN
        mov \AADLEN, %r11
        mov %r11, AadLen(%arg2) # ctx_data.aad_length = aad_length
-       xor %r11, %r11
+       xor %r11d, %r11d
        mov %r11, InLen(%arg2) # ctx_data.in_length = 0
        mov %r11, PBlockLen(%arg2) # ctx_data.partial_block_length = 0
        mov %r11, PBlockEncKey(%arg2) # ctx_data.partial_block_enc_key = 0
@@ -286,7 +286,7 @@ ALL_F:      .octa 0xffffffffffffffffffffffffffffffff
        movdqu HashKey(%arg2), %xmm13
        add %arg5, InLen(%arg2)
 
-       xor %r11, %r11 # initialise the data pointer offset as zero
+       xor %r11d, %r11d # initialise the data pointer offset as zero
        PARTIAL_BLOCK %arg3 %arg4 %arg5 %r11 %xmm8 \operation
 
        sub %r11, %arg5         # sub partial block data used
@@ -702,7 +702,7 @@ _no_extra_mask_1_\@:
 
        # GHASH computation for the last <16 Byte block
        GHASH_MUL \AAD_HASH, %xmm13, %xmm0, %xmm10, %xmm11, %xmm5, %xmm6
-       xor     %rax,%rax
+       xor     %eax, %eax
 
        mov     %rax, PBlockLen(%arg2)
        jmp     _dec_done_\@
@@ -737,7 +737,7 @@ _no_extra_mask_2_\@:
 
        # GHASH computation for the last <16 Byte block
        GHASH_MUL \AAD_HASH, %xmm13, %xmm0, %xmm10, %xmm11, %xmm5, %xmm6
-       xor     %rax,%rax
+       xor     %eax, %eax
 
        mov     %rax, PBlockLen(%arg2)
        jmp     _encode_done_\@

diff --git a/arch/x86/crypto/aesni-intel_avx-x86_64.S b/arch/x86/crypto/aesni-intel_avx-x86_64.S
index faecb1518bf8164831d4d44099c11e36fc45f411..1985ea0b551bf9bd825b05ea64be0319e4b02366 100644 (file)
--- a/arch/x86/crypto/aesni-intel_avx-x86_64.S
+++ b/arch/x86/crypto/aesni-intel_avx-x86_64.S
@@ -463,7 +463,7 @@ _get_AAD_rest_final\@:
 
 _get_AAD_done\@:
        # initialize the data pointer offset as zero
-       xor     %r11, %r11
+       xor     %r11d, %r11d
 
        # start AES for num_initial_blocks blocks
        mov     arg5, %rax                     # rax = *Y0
@@ -1770,7 +1770,7 @@ _get_AAD_rest_final\@:
 
 _get_AAD_done\@:
        # initialize the data pointer offset as zero
-       xor     %r11, %r11
+       xor     %r11d, %r11d
 
        # start AES for num_initial_blocks blocks
        mov     arg5, %rax                     # rax = *Y0

diff --git a/arch/x86/crypto/morus1280-avx2-asm.S b/arch/x86/crypto/morus1280-avx2-asm.S
index 37d422e77931129d06e88c30edd040bc78c3de04..c3f74913476c4a54bfcc54b679288c29146c9793 100644 (file)
--- a/arch/x86/crypto/morus1280-avx2-asm.S
+++ b/arch/x86/crypto/morus1280-avx2-asm.S
@@ -113,7 +113,7 @@ ENDPROC(__morus1280_update_zero)
  *   %r9
  */
 __load_partial:
-       xor %r9, %r9
+       xor %r9d, %r9d
        vpxor MSG, MSG, MSG
 
        mov %rcx, %r8

diff --git a/arch/x86/crypto/morus1280-sse2-asm.S b/arch/x86/crypto/morus1280-sse2-asm.S
index 1fe637c7be9db5515bbaff68f935dea11d151062..b3f4d103ba06afa2f12d41944cf17558d6e2cba1 100644 (file)
--- a/arch/x86/crypto/morus1280-sse2-asm.S
+++ b/arch/x86/crypto/morus1280-sse2-asm.S
@@ -235,7 +235,7 @@ ENDPROC(__morus1280_update_zero)
  *   %r9
  */
 __load_partial:
-       xor %r9, %r9
+       xor %r9d, %r9d
        pxor MSG_LO, MSG_LO
        pxor MSG_HI, MSG_HI
 

diff --git a/arch/x86/crypto/morus640-sse2-asm.S b/arch/x86/crypto/morus640-sse2-asm.S
index 71c72a0a0862c25da3293b499f0b2994e14f9926..d2958a47fccc9b53b5033fb09506ffddd573c3d3 100644 (file)
--- a/arch/x86/crypto/morus640-sse2-asm.S
+++ b/arch/x86/crypto/morus640-sse2-asm.S
@@ -113,7 +113,7 @@ ENDPROC(__morus640_update_zero)
  *   %r9
  */
 __load_partial:
-       xor %r9, %r9
+       xor %r9d, %r9d
        pxor MSG, MSG
 
        mov %rcx, %r8

diff --git a/arch/x86/crypto/sha1_ssse3_asm.S b/arch/x86/crypto/sha1_ssse3_asm.S
index 6204bd53528c65c0d4a70f05e76a60bcc476499e..613d0bfc3d840f93fb2b047479f6c5eb6c2056be 100644 (file)
--- a/arch/x86/crypto/sha1_ssse3_asm.S
+++ b/arch/x86/crypto/sha1_ssse3_asm.S
@@ -96,7 +96,7 @@
        # cleanup workspace
        mov     $8, %ecx
        mov     %rsp, %rdi
-       xor     %rax, %rax
+       xor     %eax, %eax
        rep stosq
 
        mov     %rbp, %rsp              # deallocate workspace

diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 8344dd2f310a4489da2327c0b360995c37623cce..15ebc2fc166e66c954106ce7c7db3d73d377adae 100644 (file)
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -235,7 +235,7 @@ ENTRY(secondary_startup_64)
         *              address given in m16:64.
         */
        pushq   $.Lafter_lret   # put return address on stack for unwinder
-       xorq    %rbp, %rbp      # clear frame pointer
+       xorl    %ebp, %ebp      # clear frame pointer
        movq    initial_code(%rip), %rax
        pushq   $__KERNEL_CS    # set correct cs
        pushq   %rax            # target address in negative space

diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c
index 9edadabf04f66c657f8a29bb56fe994b2559d5cf..9cb98f7b07c9afb1a8118cbf84be125567481ea0 100644 (file)
--- a/arch/x86/kernel/paravirt_patch_64.c
+++ b/arch/x86/kernel/paravirt_patch_64.c
@@ -20,7 +20,7 @@ DEF_NATIVE(, mov64, "mov %rdi, %rax");
 
 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
 DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%rdi)");
-DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %rax, %rax");
+DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %eax, %eax");
 #endif
 
 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)

diff --git a/arch/x86/lib/memcpy_64.S b/arch/x86/lib/memcpy_64.S
index 298ef1479240b6b899fb4185a5204d5ad56b8785..3b24dc05251c7ce908cc2be48befb971b5b8f564 100644 (file)
--- a/arch/x86/lib/memcpy_64.S
+++ b/arch/x86/lib/memcpy_64.S
@@ -256,7 +256,7 @@ ENTRY(__memcpy_mcsafe)
 
        /* Copy successful. Return zero */
 .L_done_memcpy_trap:
-       xorq %rax, %rax
+       xorl %eax, %eax
        ret
 ENDPROC(__memcpy_mcsafe)
 EXPORT_SYMBOL_GPL(__memcpy_mcsafe)

diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S
index ce8da3a0412cbb1a715b56e4c2f41cc431fe9965..fd369a6e9ff8ce64be071448cb45f46e0de4d1fb 100644 (file)
--- a/arch/x86/power/hibernate_asm_64.S
+++ b/arch/x86/power/hibernate_asm_64.S
@@ -137,7 +137,7 @@ ENTRY(restore_registers)
        /* Saved in save_processor_state. */
        lgdt    saved_context_gdt_desc(%rax)
 
-       xorq    %rax, %rax
+       xorl    %eax, %eax
 
        /* tell the hibernation core that we've just restored the memory */
        movq    %rax, in_suspend(%rip)