/* mt8173 */
#define SMI_LARB_MMU_EN 0xf00
+/* mt8167 */
+#define MT8167_SMI_LARB_MMU_EN 0xfc0
+
/* mt2701 */
#define REG_SMI_SECUR_CON_BASE 0x5c0
writel(*larb->mmu, larb->base + SMI_LARB_MMU_EN);
}
+static void mtk_smi_larb_config_port_mt8167(struct device *dev)
+{
+ struct mtk_smi_larb *larb = dev_get_drvdata(dev);
+
+ writel(*larb->mmu, larb->base + MT8167_SMI_LARB_MMU_EN);
+}
+
static void mtk_smi_larb_config_port_gen1(struct device *dev)
{
struct mtk_smi_larb *larb = dev_get_drvdata(dev);
.config_port = mtk_smi_larb_config_port_mt8173,
};
+static const struct mtk_smi_larb_gen mtk_smi_larb_mt8167 = {
+ /* mt8167 do not need the port in larb */
+ .config_port = mtk_smi_larb_config_port_mt8167,
+};
+
static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = {
.port_in_larb = {
LARB0_PORT_OFFSET, LARB1_PORT_OFFSET,
};
static const struct of_device_id mtk_smi_larb_of_ids[] = {
+ {
+ .compatible = "mediatek,mt8167-smi-larb",
+ .data = &mtk_smi_larb_mt8167
+ },
{
.compatible = "mediatek,mt8173-smi-larb",
.data = &mtk_smi_larb_mt8173
.compatible = "mediatek,mt8173-smi-common",
.data = &mtk_smi_common_gen2,
},
+ {
+ .compatible = "mediatek,mt8167-smi-common",
+ .data = &mtk_smi_common_gen2,
+ },
{
.compatible = "mediatek,mt2701-smi-common",
.data = &mtk_smi_common_gen1,