ARM: dts: r8a7742: Add VSP support

Add VSP support to R8A7742 (RZ/G1H) SoC dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200911080929.15058-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 170f159d66137791062d5905267c733519abfec9..6a78c813057b610f9717e0cc651166cc85cdc0e7 100644 (file)
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -1686,6 +1686,42 @@
                        status = "disabled";
                };
 
+               vsp@fe920000 {
+                       compatible = "renesas,vsp1";
+                       reg = <0 0xfe920000 0 0x8000>;
+                       interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 130>;
+                       power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+                       resets = <&cpg 130>;
+               };
+
+               vsp@fe928000 {
+                       compatible = "renesas,vsp1";
+                       reg = <0 0xfe928000 0 0x8000>;
+                       interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 131>;
+                       power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+                       resets = <&cpg 131>;
+               };
+
+               vsp@fe930000 {
+                       compatible = "renesas,vsp1";
+                       reg = <0 0xfe930000 0 0x8000>;
+                       interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 128>;
+                       power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+                       resets = <&cpg 128>;
+               };
+
+               vsp@fe938000 {
+                       compatible = "renesas,vsp1";
+                       reg = <0 0xfe938000 0 0x8000>;
+                       interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 127>;
+                       power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+                       resets = <&cpg 127>;
+               };
+
                du: display@feb00000 {
                        compatible = "renesas,du-r8a7742";
                        reg = <0 0xfeb00000 0 0x70000>;