]> git.proxmox.com Git - mirror_ubuntu-disco-kernel.git/commitdiff
MIPS: Fix BC1{EQ,NE}Z return offset calculation
authorPaul Burton <paul.burton@imgtec.com>
Thu, 21 Apr 2016 13:04:46 +0000 (14:04 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 13 May 2016 12:02:21 +0000 (14:02 +0200)
The conditions for branching when emulating the BC1EQZ & BC1NEZ
instructions were backwards, leading to each of those instructions being
treated as the other. Fix this by reversing the conditions, and clear up
the code a little for readability & checkpatch.

Fixes: c8a34581ec09 ("MIPS: Emulate the BC1{EQ,NE}Z FPU instructions")
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13151/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/branch.c

index d8f9b357b2226bef0141c8ed6340baa8fb7c0f4f..ceca6cc41b2b8b0c11f637fa639e6d037e589404 100644 (file)
@@ -688,21 +688,9 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
                        }
                        lose_fpu(1);    /* Save FPU state for the emulator. */
                        reg = insn.i_format.rt;
-                       bit = 0;
-                       switch (insn.i_format.rs) {
-                       case bc1eqz_op:
-                               /* Test bit 0 */
-                               if (get_fpr32(&current->thread.fpu.fpr[reg], 0)
-                                   & 0x1)
-                                       bit = 1;
-                               break;
-                       case bc1nez_op:
-                               /* Test bit 0 */
-                               if (!(get_fpr32(&current->thread.fpu.fpr[reg], 0)
-                                     & 0x1))
-                                       bit = 1;
-                               break;
-                       }
+                       bit = get_fpr32(&current->thread.fpu.fpr[reg], 0) & 0x1;
+                       if (insn.i_format.rs == bc1eqz_op)
+                               bit = !bit;
                        own_fpu(1);
                        if (bit)
                                epc = epc + 4 +